UPD78F9502MA-CAC-A NEC, UPD78F9502MA-CAC-A Datasheet - Page 108
UPD78F9502MA-CAC-A
Manufacturer Part Number
UPD78F9502MA-CAC-A
Description
8BIT MCU, 4K FLASH, 128B RAM, SMD
Manufacturer
NEC
Datasheet
1.UPD78F9502MA-CAC-A.pdf
(229 pages)
Specifications of UPD78F9502MA-CAC-A
Controller Family/series
UPD78F
No. Of I/o's
8
Ram Memory Size
128Byte
Cpu Speed
10MHz
No. Of Timers
2
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
4KB
Oscillator Type
External, Internal
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set are held. The I/O port output latches and output buffer statuses are also held.
108
(2) STOP mode
In either of these two modes, all the contents of registers, flags and data memory just before the standby mode is
Cautions 1. When shifting to the STOP mode, be sure to stop the peripheral hardware operation before
STOP instruction execution sets the STOP mode. In the STOP mode, the system clock oscillator stops,
stopping the whole system, thereby considerably reducing the CPU operating current.
Because this mode can be cleared by an interrupt request, it enables intermittent operations to be carried out.
However, select the HALT mode if processing must be immediately started by an interrupt request when the
operation stop time
Note
2. If the low-speed internal oscillator is operating before the STOP mode is set, oscillation of the
executing STOP instruction (except the peripheral hardware that operates on the low-speed
internal oscillation clock).
low-speed internal oscillation clock cannot be stopped in the STOP mode (refer to Table 9-1).
The operation stop time is 17 s (MIN.), 34 s (TYP.), and 67 s (MAX.).
Note
is generated after the STOP mode is released.
Preliminary User’s Manual U18681EJ1V0UD
CHAPTER 9 STANDBY FUNCTION
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