UPD78F9502MA-CAC-A NEC, UPD78F9502MA-CAC-A Datasheet - Page 141
UPD78F9502MA-CAC-A
Manufacturer Part Number
UPD78F9502MA-CAC-A
Description
8BIT MCU, 4K FLASH, 128B RAM, SMD
Manufacturer
NEC
Datasheet
1.UPD78F9502MA-CAC-A.pdf
(229 pages)
Specifications of UPD78F9502MA-CAC-A
Controller Family/series
UPD78F
No. Of I/o's
8
Ram Memory Size
128Byte
Cpu Speed
10MHz
No. Of Timers
2
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
4KB
Oscillator Type
External, Internal
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14.6.2 RESET pin
the reset signal generator on the board, signal collision takes place. To prevent this collision, isolate the connection
with the reset signal generator.
memory will not be correctly programmed. Do not input any signal other than the reset signal of the dedicated flash
memory programmer.
14.6.3 Port pins
same status as that immediately after reset. If external devices connected to the ports do not recognize the port
status immediately after reset, the port pin must be connected to V
14.6.4 Power supply
programmer.
If the reset signal of the dedicated flash memory programmer is connected to the RESET pin that is connected to
If the reset signal is input from the user system while the flash memory programming mode is set, the flash
When the flash memory programming mode is set, all the pins not used for flash memory programming enter the
The state of the pins in the self programming mode is the same as that in the HALT mode.
Connect the V
78F9501, 78F9502
DD
PD78F9500,
pin to V
RESET
DD
of the flash memory programmer, and the V
In the flash memory programming mode, the signal output by the reset
signal generator collides with the signal output by the dedicated flash
programmer. Therefore, isolate the signal of the reset signal generator.
Figure 14-4. Signal Collision (RESET Pin)
Preliminary User’s Manual U18681EJ1V0UD
Signal collision
CHAPTER 14 FLASH MEMORY
Reset signal generator
Dedicated flash programmer
connection signal
Output pin
DD
or V
SS
via a resistor.
SS
pin to V
SS
of the flash memory
141
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