UPD78F9502MA-CAC-A NEC, UPD78F9502MA-CAC-A Datasheet - Page 153
UPD78F9502MA-CAC-A
Manufacturer Part Number
UPD78F9502MA-CAC-A
Description
8BIT MCU, 4K FLASH, 128B RAM, SMD
Manufacturer
NEC
Datasheet
1.UPD78F9502MA-CAC-A.pdf
(229 pages)
Specifications of UPD78F9502MA-CAC-A
Controller Family/series
UPD78F
No. Of I/o's
8
Ram Memory Size
128Byte
Cpu Speed
10MHz
No. Of Timers
2
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
4KB
Oscillator Type
External, Internal
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(7) Flash write buffer register (FLW)
(8) Protect byte
is valid only in the self-programming mode. Because self-programming of the protected area is invalid, the data
written to the protected area is guaranteed.
This register is set with an 8-bit memory manipulation instruction.
This register is used to store the data to be written to the flash memory.
Reset signal generation clears these registers to 00H.
This protect byte is used to specify the area that is to be protected from writing or erasing. The specified area
Address: 0081H
PRSELF4
PRSELF4
PD78F9500
PD78F9501
Address: FFA8H
Symbol
7
1
0
0
1
0
0
0
0
1
FLW
PRSELF3
PRSELF3
PRSELF4
FLW7
7
1
1
1
1
1
1
1
1
6
Figure 14-14. Format of Flash Write Buffer Register (FLW)
After reset: 00H
Other than above
Other than above
FLW6
PRSELF2
PRSELF2
PRSELF3
Figure 14-15. Format of Protect Byte (1/2)
6
1
1
1
1
1
1
1
1
5
Preliminary User’s Manual U18681EJ1V0UD
CHAPTER 14 FLASH MEMORY
FLW5
5
PRSELF2
PRSELF1
PRSELF1
R/W
1
1
1
0
0
1
1
1
4
FLW4
4
PRSELF0
PRSELF0
PRSELF1
0
1
1
0
1
0
1
1
3
FLW3
3
All blocks can be written or erased.
All blocks can be written or erased.
Blocks 3 to 0 are protected.
Blocks 1 and 0 are protected.
Blocks 2 and 3 can be written or erased.
Setting prohibited
Blocks 7 to 0 are protected.
Blocks 5 to 0 are protected.
Blocks 6 and 7 can be written or erased.
Blocks 3 to 0 are protected.
Blocks 4 to 7 can be written or erased.
Blocks 1 and 0 are protected.
Blocks 2 to 7 can be written or erased.
Setting prohibited
PRSELF0
FLW2
2
2
FLW1
1
Status
Status
1
1
FLW0
0
0
1
153
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