UPD78F9502MA-CAC-A NEC, UPD78F9502MA-CAC-A Datasheet - Page 57
UPD78F9502MA-CAC-A
Manufacturer Part Number
UPD78F9502MA-CAC-A
Description
8BIT MCU, 4K FLASH, 128B RAM, SMD
Manufacturer
NEC
Datasheet
1.UPD78F9502MA-CAC-A.pdf
(229 pages)
Specifications of UPD78F9502MA-CAC-A
Controller Family/series
UPD78F
No. Of I/o's
8
Ram Memory Size
128Byte
Cpu Speed
10MHz
No. Of Timers
2
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
4KB
Oscillator Type
External, Internal
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Address: FF02H, After reset: 00H (Output latch) R/W
Symbol
P2
Address: FF03H, After reset: 00H
Symbol
P3
Address: FF04H, After reset: 00H (Output latch) R/W
Symbol
P4
(2) Port registers (P2 to P4)
These registers are used to write data to be output from the corresponding port pin to an external device
connected to the chip.
When a port register is read, the pin level is read in the input mode, and the value of the output latch of the
port is read in the output mode.
P20 to P23, P32, P40 and P43 are set by using a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation sets these registers to 00H.
Note Because P34 is read-only, its reset value is undefined.
Pmn
7
0
7
0
7
0
0
1
Output 0
Output 1
Controls of output data (in output mode)
6
0
6
0
6
0
Note
(Output latch) R/W
Figure 4-9. Format of Port Register
5
0
5
0
5
0
Preliminary User’s Manual U18681EJ1V0UD
CHAPTER 4 PORT FUNCTIONS
Note
P34
4
0
4
4
0
m = 2 to 4; n = 0 to 4
P23
P43
3
3
0
3
Input low level
Input high level
Input data read (in input mode)
P22
P32
2
2
2
0
P21
1
1
0
1
0
P20
P40
0
0
0
0
57
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