UPD78F9502MA-CAC-A NEC, UPD78F9502MA-CAC-A Datasheet - Page 71
UPD78F9502MA-CAC-A
Manufacturer Part Number
UPD78F9502MA-CAC-A
Description
8BIT MCU, 4K FLASH, 128B RAM, SMD
Manufacturer
NEC
Datasheet
1.UPD78F9502MA-CAC-A.pdf
(229 pages)
Specifications of UPD78F9502MA-CAC-A
Controller Family/series
UPD78F
No. Of I/o's
8
Ram Memory Size
128Byte
Cpu Speed
10MHz
No. Of Timers
2
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
4KB
Oscillator Type
External, Internal
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Note The clock source of the watchdog timer (WDT) is selected from f
refer to CHAPTER 7 WATCHDOG TIMER.
Clock source of
WDT is selected
by software
LSRSTOP = 1
Figure 5-10. Status Transition of Low-Speed Internal Oscillator
Note
oscillator can be stopped
Can be stopped
Low-speed internal
Low-speed internal
oscillator stops
CHAPTER 5 CLOCK GENERATORS
Preliminary User’s Manual U18681EJ1V0UD
LSRSTOP = 0
if low-speed internal oscillator
can be stopped or not
Select by option byte
power-on clear
Reset by
application
Power
V
DD
> 2.1 V 0.1 V
oscillator cannot be stopped
Low-speed internal
X
Cannot be stopped
or f
RL
, or it may be stopped. For details,
Reset signal
Clock source of
WDT is fixed to f
RL
71
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