UPD78F9502MA-CAC-A NEC, UPD78F9502MA-CAC-A Datasheet - Page 95
UPD78F9502MA-CAC-A
Manufacturer Part Number
UPD78F9502MA-CAC-A
Description
8BIT MCU, 4K FLASH, 128B RAM, SMD
Manufacturer
NEC
Datasheet
1.UPD78F9502MA-CAC-A.pdf
(229 pages)
Specifications of UPD78F9502MA-CAC-A
Controller Family/series
UPD78F
No. Of I/o's
8
Ram Memory Size
128Byte
Cpu Speed
10MHz
No. Of Timers
2
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
4KB
Oscillator Type
External, Internal
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WDTE = “ACH”
Clear WDT counter.
WDT count stops.
HALT
instruction
Figure 7-5. Status Transition Diagram When “Low-Speed Internal Oscillator Can Be Stopped by
HALT
WDT clock: f
Overflow time: 2
WDT count continues.
Interrupt
Software” Is Selected by Option Byte
X
13
/f
WDT clock = f
Select overflow time
(settable only once).
STOP
instruction
X
to 2
20
/f
X
X
WDT count stops.
STOP
WDTE = “ACH”
Clear WDT counter.
Preliminary User’s Manual U18681EJ1V0UD
Interrupt
CHAPTER 7 WATCHDOG TIMER
WDT clock: f
Overflow time: 4.27 ms to 546.13 ms (MAX.)
WDT count continues.
HALT
instruction
WDT clock: f
Overflow time: 546.13 ms (MAX.)
RL
WDT count stops.
Interrupt
Reset
RL
WDT clock = f
Select overflow time
(settable only once).
HALT
STOP
instruction
RL
Interrupt
HALT instruction
LSRSTOP = 0
LSRSTOP = 1
WDCS4 = 1
WDT operation stops.
WDT count stops.
Interrupt
STOP
STOP
instruction
WDT clock: f
WDT count stops.
WDTE = “ACH”
Clear WDT counter.
RL
Interrupt
95
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