LM75BGD NXP Semiconductors, LM75BGD Datasheet - Page 5
![no-image](/images/manufacturer_photos/0/4/487/nxp_semiconductors_sml.jpg)
LM75BGD
Manufacturer Part Number
LM75BGD
Description
IC, TEMP SENSOR, DIGITAL, 8-UXSON
Manufacturer
NXP Semiconductors
Datasheet
1.LM75BD118.pdf
(29 pages)
Specifications of LM75BGD
Ic Output Type
Digital
Sensing Accuracy Range
± 3°C
Supply Current
100µA
Supply Voltage Range
2.8V To 5.5V
Resolution (bits)
11bit
No. Of Pins
8
Package / Case
XSON
Base Number
75
Temperature Sensing Range
-55°C To +125°C
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LM75BGD
Manufacturer:
NXP/恩智浦
Quantity:
20 000
Company:
Part Number:
LM75BGD,125
Manufacturer:
NXP
Quantity:
6 180
NXP Semiconductors
LM75B_2
Product data sheet
In OS comparator mode, the OS output behaves like a thermostat. It becomes active
when the Temp exceeds the T
Reading the device registers or putting the device into shutdown does not change the
state of the OS output. The OS output in this case can be used to control cooling fans or
thermal switches.
In OS interrupt mode, the OS output is used for thermal interruption. When the device is
powered-up, the OS output is first activated only when the Temp exceeds the T
it remains active indefinitely until being reset by a read of any register. Once the OS output
has been activated by crossing T
the Temp drops below the T
by a read of any register. The OS interrupt operation would be continued in this sequence:
T
device into the shutdown mode by setting the bit 0 of the configuration register also resets
the OS output.
In both cases, comparator mode and interrupt mode, the OS output is activated only if a
number of consecutive faults, defined by the device fault queue, has been met. The fault
queue is programmable and stored in the two bits, B3 and B4, of the Configuration
register. Also, the OS output active state is selectable as HIGH or LOW by setting
accordingly the configuration register bit B2.
At power-up, the device is put into normal operation mode, the T
T
The temp reading data is not available until the first conversion is completed in about
100 ms.
The OS response to the temperature is illustrated in
Fig 5.
th(ots)
hys
is set to 75 C, the OS active state is selected LOW and the fault queue is equal to 1.
(1) OS is reset by either reading register or putting the device in shutdown mode. It is assumed that
trip, Reset, T
OS active
OS active
OS reset
OS reset
the fault queue is met at each T
OS response to temperature
T
th(ots)
T
hys
hys
Rev. 02 — 9 December 2008
trip, Reset, T
hys
th(ots)
; then again, it remains active indefinitely until being reset
th(ots)
(1)
th(ots)
, and is reset when the Temp drops below the T
th(ots)
Digital temperature sensor and thermal watchdog
OS output in comparator mode
and then reset, it can be activated again only when
OS output in interrupt mode
reading temperature limits
and T
trip, Reset, T
hys
crossing point.
Figure
hys
(1)
trip, Reset, etc. Putting the
5.
th(ots)
is set to 80 C, the
© NXP B.V. 2008. All rights reserved.
002aae334
LM75B
(1)
th(ots)
hys
; then
5 of 29
.