DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 1123
DS72030W200FPV
Manufacturer Part Number
DS72030W200FPV
Description
MPU, 32BIT, SH7203, ROMLESS, 240QFP
Manufacturer
Renesas Electronics America
Series
SH7200r
Datasheet
1.R5S72030W200FP.pdf
(1686 pages)
Specifications of DS72030W200FPV
Core Size
32bit
Program Memory Size
32KB
Cpu Speed
200MHz
Digital Ic Case Style
QFP
No. Of Pins
240
Supply Voltage Range
1.1V To 1.3V
Operating Temperature Range
-20°C To +85°C
Svhc
No SVHC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Figure 22.15 shows the relationship between the physical sector address of AND/NAND-type
flash memory and the address of flash memory.
NAND-type flash memory (512 + 16 bytes)
NAND-type flash memory (2048 + 64 bytes)
AND-type flash memory
Bit 17
Bit 17
Bit 25
Bit 25
When ADRCNT2 = 0
When ADRCNT2 = 1 (Bits[25:18] are valid.)
Bit 17
Bit 17
CA2
Row3
Row3
Order of address output to NAND-type flash memory I/O
Row3
Order of address output to NAND-type flash memory I/O
Row3
Order of address output to NAND-type flash memory I/O
Order of address output to AND-type flash memory I/O
0
0
Physical Sector
Col1
Col1
SA1
Col
0
0
Figure 22.15 Relationship between Sector Number and Address Expansion of
0
0
Physical sector address
Physical sector address bit (FLADR[17:0])
Physical sector address
Physical sector address bit (FLADR[17:0])
Physical sector address
Physical sector address bit (FLADR[25:0])
0
0
Row2
SA2
Row1
Col2
Col2
SA2
0
0
0
Row2
0
Row1
Row1
Row2
CA1
Row2
Row2
CA1
0 0
SA1
Row2
Row2
Row3
CA2
AND-/NAND-Type Flash Memory
0 0 0 0
Row1
Row3
Row1
Row1
Bit 0
Bit 0
Bit 0
Row1
SA2
Bit 0
Section 22 AND/NAND Flash Memory Controller (FLCTL)
Notes. 1.
Note: FLADR2 is not used.
Note:
2.
FLADR2 is not used.
FLADR[1:0] specify the boundary address for
column address in the unit of 512 + 16 bytes.
When AND-type flash memory is used,
set FLADR[1:0] as follows.
When FADRCNT2 = 1, FLADR[25:18] are valid.
Set the invalid bit to 0 depending on the capacity of flash memory.
00: 0 byte
01: 512 + 16 bytes
10: 1024 + 32 bytes
11: 1536 + 48 bytes
Col2
Rev. 3.00 Sep. 28, 2009 Page 1091 of 1650
Col
0
Bit 0
Bit 0
[Legend]
CA: Column address
Row: Row address (page address)
0
Col
[Legend]
CA: Column address
Row: Row address (page address)
SA1
[Legend]
CA: Column address
SA: Sector address
0 0 0 0 0 0 0 0
0
Note:
0
0
FLADR[1:0] specify the boundary
address for column address in the
unit of 512 + 16 bytes.
When NAND-type flash memory
(2048 + 64 bytes) is used, set
FLADR[1:0] as follows.
00: 0 byte
01: 512 + 16 bytes
10: 1024 + 32 bytes
11: 1536 + 48 bytes
0
Col1
0 0
REJ09B0313-0300
0 0 0 0
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