DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 160
DS72030W200FPV
Manufacturer Part Number
DS72030W200FPV
Description
MPU, 32BIT, SH7203, ROMLESS, 240QFP
Manufacturer
Renesas Electronics America
Series
SH7200r
Datasheet
1.R5S72030W200FP.pdf
(1686 pages)
Specifications of DS72030W200FPV
Core Size
32bit
Program Memory Size
32KB
Cpu Speed
200MHz
Digital Ic Case Style
QFP
No. Of Pins
240
Supply Voltage Range
1.1V To 1.3V
Operating Temperature Range
-20°C To +85°C
Svhc
No SVHC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Section 5 Exception Handling
Note:
Table 5.4
Notes: 1. Vector table address offset: See table 5.3.
Rev. 3.00 Sep. 28, 2009 Page 128 of 1650
REJ09B0313-0300
Exception Sources
Integer division exception
(division by zero)
Integer division exception (overflow)
(Reserved by system)
Trap instruction (user vector)
External interrupts (IRQ, PINT),
on-chip peripheral module interrupts*
Exception Source
Resets
Address errors, register bank
errors, interrupts, instructions
* The vector numbers and vector table address offsets for each external interrupt and on-
2. Vector number: See table 5.3.
chip peripheral module interrupt are given in table 6.4.
Calculating Exception Handling Vector Table Addresses
Vector Table Address Calculation
Vector table address = (vector table address offset)
Vector table address = VBR + (vector table address offset)
Vector
Numbers
17
18
19
31
32
63
64
511
:
:
:
= (vector number) × 4
= VBR + (vector number) × 4
Vector Table Address Offset
H'00000044 to H'00000047
H'00000048 to H'0000004B
H'0000004C to H'0000004F
H'0000007C to H'0000007F
H'00000080 to H'00000083
H'000000FC to H'000000FF
H'00000100 to H'00000103
H'000007FC to H'000007FF
:
:
:
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