DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 169
DS72030W200FPV
Manufacturer Part Number
DS72030W200FPV
Description
MPU, 32BIT, SH7203, ROMLESS, 240QFP
Manufacturer
Renesas Electronics America
Series
SH7200r
Datasheet
1.R5S72030W200FP.pdf
(1686 pages)
Specifications of DS72030W200FPV
Core Size
32bit
Program Memory Size
32KB
Cpu Speed
200MHz
Digital Ic Case Style
QFP
No. Of Pins
240
Supply Voltage Range
1.1V To 1.3V
Operating Temperature Range
-20°C To +85°C
Svhc
No SVHC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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5.5.2
The interrupt priority order is predetermined. When multiple interrupts occur simultaneously
(overlap), the interrupt controller (INTC) determines their relative priorities and starts processing
according to the results.
The priority order of interrupts is expressed as priority levels 0 to 16, with priority 0 the lowest
and priority 16 the highest. The NMI interrupt has priority 16 and cannot be masked, so it is
always accepted. The user break interrupt and H-UDI interrupt priority level is 15. Priority levels
of IRQ interrupts, PINT interrupts, and on-chip peripheral module interrupts can be set freely
using the interrupt priority registers 01, 02, and 05 to 17 (IPR01, IPR02, and IPR05 to IPR17) of
the INTC as shown in table 5.9. The priority levels that can be set are 0 to 15. Level 16 cannot be
set. See section 6.3.1, Interrupt Priority Registers 01, 02, 05 to 17 (IPR01, IPR02, IPR05 to
IPR17), for details of IPR01, IPR02, and IPR05 to IPR17.
Table 5.9
Type
NMI
User break
H-UDI
IRQ
PINT
On-chip peripheral module
Interrupt Priority Level
Interrupt Priority Order
Priority Level
16
15
15
0 to 15
Comment
Fixed priority level. Cannot be masked.
Fixed priority level.
Fixed priority level.
Set with interrupt priority registers 01, 02, and 05
to 17 (IPR01, IPR02, and IPR05 to IPR17).
Rev. 3.00 Sep. 28, 2009 Page 137 of 1650
Section 5 Exception Handling
REJ09B0313-0300
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