DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 416
DS72030W200FPV
Manufacturer Part Number
DS72030W200FPV
Description
MPU, 32BIT, SH7203, ROMLESS, 240QFP
Manufacturer
Renesas Electronics America
Series
SH7200r
Datasheet
1.R5S72030W200FP.pdf
(1686 pages)
Specifications of DS72030W200FPV
Core Size
32bit
Program Memory Size
32KB
Cpu Speed
200MHz
Digital Ic Case Style
QFP
No. Of Pins
240
Supply Voltage Range
1.1V To 1.3V
Operating Temperature Range
-20°C To +85°C
Svhc
No SVHC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Section 9 Bus State Controller (BSC)
Table 9.22 Minimum Number of Idle Cycles on Internal Bus (CPU Operation)
Table 9.23 Minimum Number of Idle Cycles on Internal Bus (DMAC Operation)
Notes: 1. The write → write and read → read columns in dual address transfer indicate the cycles
Rev. 3.00 Sep. 28, 2009 Page 384 of 1650
REJ09B0313-0300
CPU Operation
Write → write
Write → read
Read → write
Read → read
DMAC Operation
Write → write
Write → read
Read → write
Read → read
2. For the write → read cycles in dual address transfer, 0 means different channels are
3. The write → read and read → write columns in single address transfer indicate the case
in the divided access cycles.
activated successively and 2 means when the same channel is activated successively.
when different channels are activated successively. The "write" means transfer from a
device with DACK to external memory and the "read" means transfer from external
memory to a device with DACK.
8:1
1
0
1
0
Dual Address
0
0 or 2
0
0
6:1
1
0
1
0
4:1
2
0
2
0
Clock Ratio (Iφ:Bφ)
Transfer Mode
3:1
2
0
2
0
Single Address
2
0
0
2
2:1
2
0
2
0
1:1
3
1
3
1
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