DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 519
DS72030W200FPV
Manufacturer Part Number
DS72030W200FPV
Description
MPU, 32BIT, SH7203, ROMLESS, 240QFP
Manufacturer
Renesas Electronics America
Series
SH7200r
Datasheet
1.R5S72030W200FP.pdf
(1686 pages)
Specifications of DS72030W200FPV
Core Size
32bit
Program Memory Size
32KB
Cpu Speed
200MHz
Digital Ic Case Style
QFP
No. Of Pins
240
Supply Voltage Range
1.1V To 1.3V
Operating Temperature Range
-20°C To +85°C
Svhc
No SVHC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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11.3.5
The TSR registers are 8-bit readable/writable registers that indicate the status of each channel. The
MTU2 has six TSR registers, two for channel 0 and one each for channels 1 to 4.
• TSR_0, TSR_1, TSR_2, TSR_3, TSR_4
Bit
7
6
5
Bit Name
TCFD
—
TCFU
Timer Status Register (TSR)
Note:
1.
Initial value:
Writing 0 to this bit after reading it as 1 clears the flag and is the only allowed way.
Initial
Value
1
1
0
R/W:
Bit:
TCFD
R
7
1
R/W
R
R
R/(W)*
R
6
1
-
R/(W)*
1
TCFU
Description
Count Direction Flag
Status flag that shows the direction in which TCNT
counts in channels 1 to 4.
In channel 0, bit 7 is reserved. It is always read as 1
and the write value should always be 1.
0: TCNT counts down
1: TCNT counts up
Reserved
This bit is always read as 1. The write value should
always be 1.
Underflow Flag
Status flag that indicates that TCNT underflow has
occurred when channels 1 and 2 are set to phase
counting mode. Only 0 can be written, for flag clearing.
In channels 0, 3, and 4, bit 5 is reserved. It is always
read as 0 and the write value should always be 0.
[Clearing condition]
•
[Setting condition]
•
5
0
1
When 0 is written to TCFU after reading TCFU = 1*
When the TCNT value underflows (changes from
H'0000 to H'FFFF)
R/(W)*
TCFV
4
0
Section 11 Multi-Function Timer Pulse Unit 2 (MTU2)
1
R/(W)*
TGFD
3
0
1
R/(W)*
TGFC
Rev. 3.00 Sep. 28, 2009 Page 487 of 1650
2
0
1
TGFB
R/(W)*
1
0
1
TGFA
R/(W)*
0
0
1
REJ09B0313-0300
2
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