DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 540
DS72030W200FPV
Manufacturer Part Number
DS72030W200FPV
Description
MPU, 32BIT, SH7203, ROMLESS, 240QFP
Manufacturer
Renesas Electronics America
Series
SH7200r
Datasheet
1.R5S72030W200FP.pdf
(1686 pages)
Specifications of DS72030W200FPV
Core Size
32bit
Program Memory Size
32KB
Cpu Speed
200MHz
Digital Ic Case Style
QFP
No. Of Pins
240
Supply Voltage Range
1.1V To 1.3V
Operating Temperature Range
-20°C To +85°C
Svhc
No SVHC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Section 11 Multi-Function Timer Pulse Unit 2 (MTU2)
Note:
Table 11.30 Setting of Bits BF1 and BF0
Table 11.31 TIOC4D Output Level Select Function
Note: The reverse phase waveform initial output value changes to the active level after elapse of
Rev. 3.00 Sep. 28, 2009 Page 508 of 1650
REJ09B0313-0300
Bit
0
Bit 7
BF1
0
0
1
1
Bit 5
OLS3N
0
1
the dead time after count start.
* Setting the TOCS bit in TOCR1 to 1 makes this bit setting valid.
Bit Name
OLS1P
Initial Output
High level
Low level
Bit 6
BF0
0
1
0
1
Initial
value
0
Complementary PWM Mode
Does not transfer data from the
buffer register (TOLBR) to TOCR2.
Transfers data from the buffer
register (TOLBR) to TOCR2 at the
crest of the TCNT_4 count.
Transfers data from the buffer
register (TOLBR) to TOCR2 at the
trough of the TCNT_4 count.
Transfers data from the buffer
register (TOLBR) to TOCR2 at the
crest and trough of the TCNT_4
count.
Active Level
Low level
High level
R/W
R/W
Description
Output Level Select 1P*
This bit selects the output level on TIOC3B in reset-
synchronized PWM mode/complementary PWM mode.
See table 11.36.
Up Count
High level
Low level
Function
Description
Compare Match Output
Reset-Synchronized PWM Mode
Does not transfer data from the
buffer register (TOLBR) to TOCR2.
Transfers data from the buffer
register (TOLBR) to TOCR2 when
TCNT_3/TCNT_4 is cleared
Setting prohibited
Setting prohibited
Down Count
Low level
High level
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