DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 874
DS72030W200FPV
Manufacturer Part Number
DS72030W200FPV
Description
MPU, 32BIT, SH7203, ROMLESS, 240QFP
Manufacturer
Renesas Electronics America
Series
SH7200r
Datasheet
1.R5S72030W200FP.pdf
(1686 pages)
Specifications of DS72030W200FPV
Core Size
32bit
Program Memory Size
32KB
Cpu Speed
200MHz
Digital Ic Case Style
QFP
No. Of Pins
240
Supply Voltage Range
1.1V To 1.3V
Operating Temperature Range
-20°C To +85°C
Svhc
No SVHC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Section 17 I
17.3.3
ICMR is an 8-bit readable/writable register that selects whether the MSB or LSB is transferred
first, performs master mode wait control, and selects the transfer bit count.
Bits BC[2:0] are initialized to H'0 by the IICRST bit in ICCR2.
Rev. 3.00 Sep. 28, 2009 Page 842 of 1650
REJ09B0313-0300
Bit
7
6
5, 4
3
I
2
Bit Name
MLS
⎯
⎯
BCWP
C Bus Mode Register (ICMR)
2
C Bus Interface 3 (IIC3)
Initial value:
Initial
Value
0
0
All 1
1
R/W:
Bit:
R/W
MLS
7
0
R/W
R/W
R
R
R/W
R
6
0
-
Description
MSB-First/LSB-First Select
0: MSB-first
1: LSB-first
Set this bit to 0 when the I
Reserved
This bit is always read as 0. The write value should
always be 0.
Reserved
These bits are always read as 1. The write value should
always be 1.
BC Write Protect
Controls the BC[2:0] modifications. When modifying the
BC[2:0] bits, this bit should be cleared to 0. In clocked
synchronous serial mode, the BC[2:0] bits should not
be modified.
0: When writing, values of the BC[2:0] bits are set.
1: When reading, 1 is always read.
R
5
1
-
When writing, settings of the BC[2:0] bits are invalid.
R
4
1
-
BCWP
R/W
3
1
R/W
2
0
BC[2:0]
R/W
1
0
2
C bus format is used.
R/W
0
0
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