IS62WV5128BLL-55HLI INTEGRATED SILICON SOLUTION (ISSI), IS62WV5128BLL-55HLI Datasheet

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IS62WV5128BLL-55HLI

Manufacturer Part Number
IS62WV5128BLL-55HLI
Description
SRAM, 512K X 8, 3V, 55NS, 32STSOP1
Manufacturer
INTEGRATED SILICON SOLUTION (ISSI)
Datasheet

Specifications of IS62WV5128BLL-55HLI

Memory Size
4Mbit
Access Time
55ns
Supply Voltage Range
2.5V To 3.6V
Memory Case Style
TSOP-1
No. Of Pins
32
Operating Temperature Range
-40°C To +85°C
Memory Configuration
512K X 8
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
IS62WV5128ALL
IS62WV5128BLL
512K x 8 LOW VOLTAGE,
ULTRA LOW POWER CMOS STATIC RAM
FEATURES
• High-speed access time: 55ns, 70ns
• CMOS low power operation
• TTL compatible interface levels
• Single power supply
• Fully static operation: no clock or refresh
• Three state outputs
• Industrial temperature available
• Lead-free available
FUNCTIONAL BLOCK DIAGRAM
Copyright © 2005 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time
without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to
obtain the latest version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. — www.issi.com
Rev. E
01/29/08
1.65V – 2.2V V
required
36 mW (typical) operating
9 µW (typical) CMOS standby
2.5V – 3.6V V
DD
DD
(IS62WV5128BLL)
(IS62WV5128ALL)
I/O0-I/O7
A0-A18
V
GND
DD
CS1
WE
OE
DECODER
CIRCUIT
CONTROL
CIRCUIT
DATA
I/O
DESCRIPTION
The
speed, 4M bit static RAMs organized as 512K words by 8
bits. It is fabricated using
technology. This highly reliable process coupled with
innovative circuit design techniques, yields high-
performance and low power consumption devices.
When CS1 is HIGH (deselected) the device assumes a
standby mode at which the power dissipation can be
reduced down with CMOS input levels.
Easy memory expansion is provided by using Chip Enable
and Output Enable inputs. The active LOW Write Enable
(WE) controls both writing and reading of the memory.
The IS62WV5128ALL and IS62WV5128BLL are packaged
in the JEDEC standard 32-pin TSOP (TYPE I), 32-pin
sTSOP (TYPE I), 32-pin TSOP (Type II), 32-pin SOP and
36-pin mini BGA.
ISSI
MEMORY ARRAY
COLUMN I/O
IS62WV5128ALL / IS62WV5128BLL are high-
512K x 8
ISSI
's high-performance CMOS
JANUARY 2008
1

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IS62WV5128BLL-55HLI Summary of contents

Page 1

... Easy memory expansion is provided by using Chip Enable and Output Enable inputs. The active LOW Write Enable (WE) controls both writing and reading of the memory. The IS62WV5128ALL and IS62WV5128BLL are packaged in the JEDEC standard 32-pin TSOP (TYPE I), 32-pin sTSOP (TYPE I), 32-pin TSOP (Type II), 32-pin SOP and 36-pin mini BGA ...

Page 2

... IS62WV5128ALL, IS62WV5128BLL PIN DESCRIPTIONS A0-A18 Address Inputs CS1 Chip Enable 1 Input OE Output Enable Input WE Write Enable Input I/O0-I/O7 Input/Output NC No Connection V Power DD GND Ground 36-pin mini BGA (B) (6mm x 8mm) (Package Code I/ I/ GND E VDD F I/O6 A18 A17 OE CS1 G I/O7 A16 A9 A10 ...

Page 3

... IS62WV5128ALL, IS62WV5128BLL PIN DESCRIPTIONS A0-A18 Address Inputs CS1 Chip Enable 1 Input OE Output Enable Input WE Write Enable Input I/O0-I/O7 Input/Output V Power DD GND Ground PIN CONFIGURATION 32-pin TSOP (TYPE I), (Package Code T) 32-pin sTSOP (TYPE I) (Package Code H) A11 A13 A18 6 A15 A17 9 A16 10 A14 ...

Page 4

... 2.1 mA 2.5-3.6V OL 1.65-2.2V 2.5-3.6V 1.65-2.2V 2.5-3.6V GND ≤ V ≤ GND ≤ V ≤ Outputs Disabled OUT DD Integrated Silicon Solution, Inc. — www.issi.com IS62WV5128BLL 2.5V - 3.6V 2.5V - 3.6V Unit +0 +0 °C W Min. Max. Unit 1.4 — 2.2 — — 0.2 — ...

Page 5

... Integrated Silicon Solution, Inc. — www.issi.com Rev. E 01/29/08 Conditions OUT IS62WV5128ALL (Unit) 0. -0. REF See Figures 1 and 2 2.5V - 3.6V 3070 3150 1.5V 2.8V R2 Figure 2 Max. Unit IS62WV5128BLL (Unit) 0. -0.3V DD 5ns V REF See Figures 1 and 2 R1 VTM OUTPUT Including jig and scope 5 ...

Page 6

... IS62WV5128ALL, IS62WV5128BLL POWER SUPPLY CHARACTERISTICS 62WV5128ALL (1.65V - 2.2V) Symbol Parameter Test Conditions I V Dynamic Operating Supply Current I OUT I Operating Supply Current f=1 I TTL Standby Current (TTL Inputs) V CS1 = CMOS Standby CS1 ≥ V Current (CMOS Inputs Note address and data inputs are cycling at the maximum frequency means no input lines change. ...

Page 7

... IS62WV5128ALL, IS62WV5128BLL READ CYCLE SWITCHING CHARACTERISTICS Symbol Parameter t Read Cycle Time RC t Address Access Time AA t Output Hold Time OHA CS1 Access Time t ACS1 OE Access Time t DOE OE to High-Z Output t (2) HZOE OE to Low-Z Output t (2) LZOE CS1 to High-Z Output t HZCS1 ...

Page 8

... IS62WV5128ALL, IS62WV5128BLL AC WAVEFORMS (1,3) (CS1, OE Controlled) READ CYCLE NO. 2 ADDRESS OE CS1 t DOUT Notes HIGH for a Read Cycle. 2. The device is continuously selected. OE, CS1 Address is valid prior to or coincident with CS1 LOW transition DOE t LZOE t ACS1 LZCS1 HIGH Integrated Silicon Solution, Inc. — www.issi.com ...

Page 9

... IS62WV5128ALL, IS62WV5128BLL WRITE CYCLE SWITCHING CHARACTERISTICS Symbol Parameter t Write Cycle Time WC CS1 to Write End t SCS1 t Address Setup Time to Write End AW t Address Hold from Write End HA t Address Setup Time SA WE Pulse Width t PWE t Data Setup to Write End SD t Data Hold from Write End ...

Page 10

... IS62WV5128ALL, IS62WV5128BLL (WE Controlled HIGH During Write Cycle) WRITE CYCLE NO. 2 ADDRESS OE CS1 DOUT DATA UNDEFINED DIN WRITE CYCLE NO. 3 (WE Controlled LOW During Write Cycle) ADDRESS OE CS1 DOUT DATA UNDEFINED DIN SCS1 PWE t HZWE HIGH DATA-IN VALID SCS1 PWE t t HZWE HIGH-Z ...

Page 11

... IS62WV5128ALL, IS62WV5128BLL DATA RETENTION SWITCHING CHARACTERISTICS Symbol Parameter V V for Data Retention Data Retention Current DR t Data Retention Setup Time SDR t Recovery Time RDR DATA RETENTION WAVEFORM (CS1 t SDR CS1 GND Integrated Silicon Solution, Inc. — www.issi.com Rev. E 01/29/08 Test Condition See Data Retention Waveform = 1.2V, CS1 ≥ ...

Page 12

... IS62WV5128BLL-55H Industrial Range: –40°C to +85°C Speed (ns) Order Part No. 55 IS62WV5128BLL-55TI 55 IS62WV5128BLL-55TLI 55 IS62WV5128BLL-55QLI 55 IS62WV5128BLL-55T2I 55 IS62WV5128BLL-55T2LI 55 IS62WV5128BLL-55HI 55 IS62WV5128BLL-55HLI 55 IS62WV5128BLL-55BI 55 IS62WV5128BLL-55BLI 12 Package TSOP, TYPE I TSOP, TYPE II sTSOP, TYPE I mini BGA (6mmx8mm) Package sTSOP, TYPE I Package TSOP, TYPE I TSOP, TYPE I, Lead-free SOP, Lead-free ...

Page 13

PACKAGING INFORMATION Plastic TSOP Package Code: T (Type II Millimeters Inches Symbol Min Max Min Ref. Std. No. Leads ( — 1.20 — A1 0.05 0.15 0.002 0.006 b 0.30 0.52 0.012 ...

Page 14

PACKAGING INFORMATION Plastic TSOP-Type I Package Code: T (32-pin MILLIMETERS Symbol Min. Max. No. Leads A — 1.20 A1 0.05 0.25 B 0.17 0.23 C 0.12 0.17 D 7.90 8.10 E 18.30 18.50 H 19.80 20.20 e ...

Page 15

PACKAGING INFORMATION 450-mil Plastic SOP Package Code: Q (32-pin MILLIMETERS Symbol Min. Max. No. Leads A — 3.00 A1 0.10 — B 0.36 0.51 C 0.15 0.30 D 20.14 20.75 E 13.87 14.38 E1 11.18 ...

Page 16

PACKAGING INFORMATION Plastic STSOP - 32 pins Package Code: H (Type I) 1 Plastic STSOP (H - Type I) Millimeters Symbol Min Max Ref. Std — 1.25 A1 0.05 — A2 0.95 1.05 b 0.17 0.23 C ...

Page 17

PACKAGING INFORMATION Mini Ball Grid Array Package Code: B (36-pin) Top View SEATING PLANE mBGA - 6mm x 8mm MILLIMETERS Sym. Min. Typ. Max. Min. Typ. ...

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