COP8SAA716M8 National Semiconductor, COP8SAA716M8 Datasheet - Page 27
COP8SAA716M8
Manufacturer Part Number
COP8SAA716M8
Description
-LIFETIME BUYS TIL 06/05
Manufacturer
National Semiconductor
Datasheet
1.COP8SAA716M8.pdf
(60 pages)
Specifications of COP8SAA716M8
Rohs Compliant
NO
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9.0 Interrupts
9.1 INTRODUCTION
The device supports eight vectored interrupts. Interrupt
sources include Timer 1, Timer T0, Port L Wakeup, Software
Trap, MICROWIRE/PLUS, and External Input.
All interrupts force a branch to location 00FF Hex in program
memory. The VIS instruction may be used to vector to the
appropriate service routine from location 00FF Hex.
FIGURE 21. Interrupt Block Diagram
27
The Software trap has the highest priority while the default
VIS has the lowest priority.
Each of the six maskable inputs has a fixed arbitration
ranking and vector.
Figure 21 shows the Interrupt Block Diagram.
DS012838-28
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