DSPIC30F4012-20E/SP Microchip Technology, DSPIC30F4012-20E/SP Datasheet - Page 233
DSPIC30F4012-20E/SP
Manufacturer Part Number
DSPIC30F4012-20E/SP
Description
IC,DSP,16-BIT,CMOS,DIP,28PIN,PLASTIC
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr
Datasheets
1.DSPIC30F2011-20ISO.pdf
(66 pages)
2.DSPIC30F4012-30ISO.pdf
(238 pages)
3.DSPIC30F4012-30ISO.pdf
(18 pages)
4.DSPIC30F4012-30ISO.pdf
(6 pages)
5.DSPIC30F4012-30ISO.pdf
(16 pages)
6.DSPIC30F4012-30ISO.pdf
(22 pages)
Specifications of DSPIC30F4012-20E/SP
Rohs Compliant
YES
Core Processor
dsPIC
Core Size
16-Bit
Speed
20 MIPS
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
20
Program Memory Size
48KB (16K x 24)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
DSPIC30F401220ESP
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSPIC30F4012-20E/SP
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
- DSPIC30F2011-20ISO PDF datasheet
- DSPIC30F4012-30ISO PDF datasheet #2
- DSPIC30F4012-30ISO PDF datasheet #3
- DSPIC30F4012-30ISO PDF datasheet #4
- DSPIC30F4012-30ISO PDF datasheet #5
- DSPIC30F4012-30ISO PDF datasheet #6
- Current page: 233 of 238
- Download datasheet (4Mb)
U
UART
Unit ID Locations............................................................... 149
Universal Asynchronous Receiver
W
Wake-up from Sleep ......................................................... 149
Wake-up from Sleep and Idle ............................................. 47
Watchdog Timer (WDT) ............................................ 149, 159
WWW Address.................................................................. 235
WWW, On-Line Support ....................................................... 8
© 2010 Microchip Technology Inc.
Address Detect Mode ............................................... 123
Alternate I/O.............................................................. 121
Auto-Baud Support ................................................... 124
Baud Rate Generator................................................ 123
Disabling ................................................................... 121
Enabling and Setting Up ........................................... 121
Loopback Mode ........................................................ 123
Module Overview ...................................................... 119
Operation During CPU Sleep and Idle Modes .......... 124
Receiving Data.......................................................... 122
Reception Error Handling.......................................... 122
Setting Up Data, Parity and Stop Bit Selections ....... 121
Transmitting Data...................................................... 121
UART1 Register Map................................................ 125
UART2 Register Map................................................ 125
Transmitter Module (UART)...................................... 119
Enabling and Disabling ............................................. 159
Operation .................................................................. 159
In 8-bit or 9-bit Data Mode ................................ 122
Interrupt ............................................................ 122
Receive Buffer (UxRCB) ................................... 122
Framing Error (FERR) ...................................... 123
Idle Status ......................................................... 123
Parity Error (PERR) .......................................... 123
Receive Break .................................................. 123
Receive Buffer Overrun Error (OERR Bit) ........ 122
Break ................................................................ 122
In 8-bit Data Mode ............................................ 121
In 9-bit Data Mode ............................................ 121
Interrupt ............................................................ 122
Transmit Buffer (UxTXB) .................................. 121
dsPIC30F4011/4012
DS70135G-page 233
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