EP9307-CR Cirrus Logic Inc, EP9307-CR Datasheet - Page 105
EP9307-CR
Manufacturer Part Number
EP9307-CR
Description
IC,MICROPROCESSOR,32-BIT,CMOS,BGA,272PIN,PLASTIC
Manufacturer
Cirrus Logic Inc
Series
EP9r
Specifications of EP9307-CR
Rohs Compliant
NO
Core Processor
ARM9
Core Size
16/32-Bit
Speed
200MHz
Connectivity
EBI/EMI, Ethernet, I²C, IrDA, Keypad/Touchscreen, SPI, UART/USART, USB
Peripherals
AC'97, DMA, I²:S, LCD, LED, MaverickKey, POR, PWM, WDT
Number Of I /o
14
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Data Converters
A/D 8x12b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
272-TFBGA
Processor Series
EP93xx
Core
ARM920T
Data Bus Width
32 bit
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
EDB9307A-Z
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With
598-1133 - KIT DEVELOPMENT EP9307 ARM9
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
No
Other names
598-1254
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP9307-CR
Manufacturer:
CIRRUSL
Quantity:
5
Part Number:
EP9307-CRZ
Manufacturer:
CIRRUS
Quantity:
20 000
Part Number:
EP9307-CRZ/E2
Manufacturer:
CIRRUS
Quantity:
20 000
Company:
Part Number:
EP9307-CRZR
Manufacturer:
Cirrus Logic Inc
Quantity:
10 000
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DS785UM1
3.5.5 Shift Instructions
31:28
31:28
cond
cond
Bit Definitions:
Description:
Mnemonic:
Bit Definitions:
Definition:
Mnemonic:
Bit Definitions:
1 1 1 0
1 1 1 0
27:24
27:24
Shift 32-bit Integer
Shift 64-bit Integer
CRd:
CRn:
Shifts a 32-bit integer left or right. The shift count is a two’s complement
integer stored in an ARM register; the count is positive for left shifts and
negative for right shifts. This instruction may also be used to copy a 32-bit
integer from one register to another by using a shift value of 0.
CFRSHL32<cond> CRm, CRn, Rd
CRm:
CRn:
Rd:
Shifts a 64-bit integer left or right. The shift count is a two’s complement
integer stored in an ARM register; the count is positive for left shifts and
negative for right shifts. This instruction may also be used to copy a 64-bit
integer from one register to another using a shift value of 0.
CFRSHL64<cond> CRm, CRn, Rd
CRm:
CRn:
Rd:
23:22
23:22
0 0
0 0
21
21
0
0
Copyright 2007 Cirrus Logic
20
20
0
0
Destination register
Source register
Destination register
Source register
Shift count register in ARM
Destination register
Source register
Shift count register in ARM
19:16
19:16
CRn
CRn
15:12
15:12
Rd
Rd
0 1 0 1
0 1 0 1
11:8
11:8
MaverickCrunch Co-Processor
0 1 0
0 1 1
7:5
7:5
EP93xx User’s Guide
4
1
4
1
CRm
CRm
3:0
3:0
3-35
3
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