PIC16F76-E/SP Microchip Technology, PIC16F76-E/SP Datasheet - Page 593
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PIC16F76-E/SP
Manufacturer Part Number
PIC16F76-E/SP
Description
28 PIN, 14KB STD FLASH, 368 RAM, 22 I/O,
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F688T-ISL.pdf
(688 pages)
3.PIC16F818-ISO.pdf
(6 pages)
4.PIC16F73-ISP.pdf
(174 pages)
5.PIC16F73-ISP.pdf
(14 pages)
6.PIC16F73-ISP.pdf
(12 pages)
Specifications of PIC16F76-E/SP
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
14KB (8K x 14)
Program Memory Type
FLASH
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 5x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
28-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PIC16F76E/SP
- PIC16F616T-ISL PDF datasheet
- PIC16F688T-ISL PDF datasheet #2
- PIC16F818-ISO PDF datasheet #3
- PIC16F73-ISP PDF datasheet #4
- PIC16F73-ISP PDF datasheet #5
- PIC16F73-ISP PDF datasheet #6
- Current page: 593 of 688
- Download datasheet (3Mb)
30.19
Note 1: Specification 73A is only required if specifications 71A and 72A are used.
Param.
1997 Microchip Technology Inc.
No.
71A
72A
73A
70
71
72
73
74
75
76
78
79
80
SCK
(CKP = 0)
(CKP = 1)
SDO
SDI
SS
SCK
† Data in “Typ” column is at 5V, 25˚C unless otherwise stated. These parameters are for design guidance only and are not
Refer to
tested.
TssL2scH,
TssL2scL
TscH
TscL
TdiV2scH,
TdiV2scL
T
TscH2diL,
TscL2diL
TdoR
TdoF
TscR
TscF
TscH2doV,
TscL2doV
B
Symbol
Example SSP and Master SSP SPI Mode Timing Waveforms and Requirements
2
B
Figure 30-1
Figure 30-9:
Table 30-21:
Characteristic
SS to SCK or SCK input
SCK input high time
(slave mode)
SCK input low time
(slave mode)
Setup time of SDI data input to SCK edge
Last clock edge of Byte1 to the 1st clock
edge of Byte2
Hold time of SDI data input to SCK edge
SDO data output rise time PIC16CXXX
SDO data output fall time
SCK output rise time
(master mode)
SCK output fall time (master mode)
SDO data output valid
after SCK edge
Section 30. Electrical Specifications
70
for load conditions.
80
71
73
MSb IN
Example SPI Mode Requirements (Master Mode, CKE = 0)
MSb
Example SPI Master Mode Timing (CKE = 0)
74
72
75, 76
Continuous
Single Byte
Continuous
Single Byte
PIC16LCXXX
PIC16CXXX
PIC16LCXXX
PIC16CXXX
PIC16LCXXX
BIT6 - - - - - -1
BIT6 - - - -1
1.25T
1.25T
1.5T
78
79
Min
T
100
100
CY
40
40
—
—
—
—
—
—
—
—
CY
CY
CY
+ 40
+ 30
+ 30
LSb
79
78
LSb IN
Typ† Max Units
—
—
—
—
—
—
—
—
10
20
10
10
20
10
—
—
100
—
—
—
—
—
—
—
—
25
45
25
25
45
25
50
DS31030A-page 30-23
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Note 1
Note 1
Note 1
Conditions
30
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