PIC16F76-E/SP Microchip Technology, PIC16F76-E/SP Datasheet - Page 670
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PIC16F76-E/SP
Manufacturer Part Number
PIC16F76-E/SP
Description
28 PIN, 14KB STD FLASH, 368 RAM, 22 I/O,
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F688T-ISL.pdf
(688 pages)
3.PIC16F818-ISO.pdf
(6 pages)
4.PIC16F73-ISP.pdf
(174 pages)
5.PIC16F73-ISP.pdf
(14 pages)
6.PIC16F73-ISP.pdf
(12 pages)
Specifications of PIC16F76-E/SP
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
14KB (8K x 14)
Program Memory Type
FLASH
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 5x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
28-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PIC16F76E/SP
- PIC16F616T-ISL PDF datasheet
- PIC16F688T-ISL PDF datasheet #2
- PIC16F818-ISO PDF datasheet #3
- PIC16F73-ISP PDF datasheet #4
- PIC16F73-ISP PDF datasheet #5
- PIC16F73-ISP PDF datasheet #6
- Current page: 670 of 688
- Download datasheet (3Mb)
PICmicro MID-RANGE MCU FAMILY
C.7
C.8
C.9
DS31034A-page 34-18
USART
Device Oscillator
Parallel Slave Port
The original USART/SCI module that was offered on Midrange devices specified a “high speed”
mode (when the BRGH control bit is set). Due to the design of the sampling circuitry, the opera-
tion of this mode was not as robust as desired. The sampling circuitry has been changed so that
operation now meets Microchip’s requirements. The difference in the sampling is described in the
“USART”
Table C-5:
A new mode has been added into the device oscillator which allows the device to operate from
an internal RC. This is specified at time of device programming (configuration word). This mode
will be included on many future devices. See the device data sheets configuration word to deter-
mine if the device supports this mode.
The control pins have changed from level sensitive to edge sensitive.
Table C-6:
PIC16C63
PIC16CR63
PIC16C65
PIC16C65A
PIC16CR65
PIC16C66
PIC16C67
PIC16C73
PIC16C73A
PIC16C74
PIC16C74A
PIC16C76
PIC16C77
New Devices with
USART/SCI module
PIC16C64
PIC16C64A
PIC16C65
PIC16C65A
PIC16C67
PIC16C74
PIC16C74A
PIC16C77
New Devices with
Parallel Slave Port
section.
Device
Device
USART/SCI Sampling Logic
Parallel Slave Port Change Sensitivity
Table C-5
shows which devices use the new and old sampling logic.
Level
Old
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
—
—
—
—
—
—
—
—
—
—
—
Sampling Logic
Sensitivity
1997 Microchip Technology Inc.
Edge
New
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
—
—
—
—
—
—
—
—
—
—
—
—
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