PIC18F8722T-I/PT Microchip Technology, PIC18F8722T-I/PT Datasheet - Page 7

• Manufacturer Part Number: PIC18F8722T-I/PT
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,80PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F8722T-I/PT

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TFQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DV164136 - DEVELOPMENT KIT FOR PIC18XLT80PT3 - SOCKET TRAN ICE 80MQFP/TQFPAC164320 - MODULE SKT MPLAB PM3 80TQFPAC174011 - MODULE SKT PROMATEII 80TQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

21. Module: MSSP (SPI Mode)
FIGURE 1:
EXAMPLE 4:
© 2006 Microchip Technology Inc.
LOOP BTFSS SSPSTAT, BF
When the SPI is using Timer2/2 as the clock
source, a shorter than expected SCKx pulse may
occur on the first bit of the transmitted/received
data (Figure 1).
Work around
To avoid producing the short pulse, turn off Timer2
and clear the TMR2 register, load the SSPxBUF
with the data to transmit and then turn Timer2 back
on. Refer to Example 4 for sample code.
SDOx
SCKx
BRA
MOVF
MOVWF RXDATA
MOVF
BCF
CLRF
MOVWF SSPBUF
BSF
Write SSPxBUF
LOOP
SSPBUF, W
TXDATA, W
T2CON, TMR2ON
TMR2
T2CON, TMR2ON
bit 0 = 1 bit 1 = 0
SCKx PULSE VARIATION
USING TIMER2/2
AVOIDING THE INITIAL
SHORT SCK PULSE
;Data received?
;(Xmit complete?)
;No
;W = SSPBUF
;Save in user RAM
;W = TXDATA
;Timer2 off
;Clear Timer2
;Xmit New data
;Timer2 on
bit 2 = 1
. . . .
PIC18F6627/6722/8627/8722
22. Module: Timer1
23. Module: PORTE
In 16-bit Asynchronous Counter mode or 16-bit
Asynchronous Oscillator mode, the TMR1H and
TMR3H buffers do not update when TMRxL is
read. This issue only affects reading the TMRxH
registers. The timers increment and set the inter-
rupt flags as expected. The Timer registers can
also be written as expected.
Work around
Use 8-bit mode by clearing the RD16 (T1CON<7>)
bit or use the synchronization option by clearing
T1SYNC (T1CON<2>).
The RE4 pin latch remains at a logic level zero
when the ECCPMX Configuration bit is clear and
selects PORTH.
Work around
This issue will be corrected in a future revision of
silicon.
DS80221C-page 7