QLX4600LIQSR Intersil, QLX4600LIQSR Datasheet
QLX4600LIQSR
Specifications of QLX4600LIQSR
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QLX4600LIQSR Summary of contents
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... Improved BER CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. | 1-888-INTERSIL or 1-888-468-3774 Intersil (and design registered trademark of Intersil Americas Inc. All other trademarks mentioned are the property of their respective owners. Copyright Intersil Americas Inc. 2009. All Rights Reserved ...
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... PART MARKING QLX4600LIQT7 QLX4600LIQ QLX4600LIQSR QLX4600LIQ NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach materials and NiPdAu plate - e4 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020 ...
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Pin Descriptions PIN NAME PIN NUMBER DT 1 Detection Threshold. Reference DC current threshold for input signal power detection. Data output OUT[k] is muted when the power of the equalized version of IN[k] falls below the threshold. Tie to ground ...
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Pin Descriptions PIN NAME PIN NUMBER CP2[C,B,A] 39, 40, 41 Control pins for setting equalizer 2. CMOS logic inputs. Pins are read as a 3-digit number to set the boost level the MSB, and C is the LSB. ...
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... Thermal Resistance (Typical QFN Package (Note 1 Operating Ambient Temperature Range 0°C to +70°C Storage Ambient Temperature Range . . . . . -55°C to +150°C Maximum Junction Temperature +125°C Pb-Free Reflow Profile see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp CONDITION NRZ data applied to any channel Typical values are ...
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Electrical Specifications Typical values are PARAMETERS SYMBOL Input Return Loss (Common Mode) Input Return Loss (Com. to Diff. Conversion) Output Amplitude Range V OUT Differential Output Impedance Output Return Loss S ...
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Electrical Specifications Typical values are PARAMETERS SYMBOL Line Silence-to-Data t SD Response Time Timing Difference (SAS NOTES: 3. After channel loss, differential amplitudes at QLx4600-SL30 inputs must meet the input voltage range specified ...
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Typical Performance Characteristics V = 1.2V +25°C, unless otherwise noted. Performance was characterized using the system testbed shown Figure 1. Unless otherwise noted, the transmitter generated a non-return-to-zero (NRZ) PRBS-7 sequence at 800mV (differential) with ...
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Typical Performance Characteristics 40ps/div FIGURE 4. RECEIVED SIGNAL AFTER 20m OF 24AWG TWIN-AXIAL CABLE (CABLE A), 5Gb/s 40ps/div FIGURE 6. RECEIVED SIGNAL AFTER 12m OF 30AWG TWIN-AXIAL CABLE (CABLE B), 5Gb/s 40ps/div FIGURE 8. RECEIVED SIGNAL AFTER 20m OF 28AWG ...
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Typical Performance Characteristics 40ps/div FIGURE 10. RECEIVED SIGNAL AFTER 30m OF 24AWG TWIN-AXIAL CABLE (NOTE 13), 5Gb/s 32ps/div FIGURE 12. RECEIVED SIGNAL AFTER 15m OF 28AWG TWIN-AXIAL CABLE (CABLE D) (NOTE 13), 6.25Gb/s 32ps/div FIGURE 14. RECEIVED SIGNAL AFTER 40" ...
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Typical Performance Characteristics 0 Channel 1 -5 Channel 2 Channel 3 Channel 4 -10 -15 -20 -25 -30 0 0.5 1 1.5 2 Frequency (GHz) FIGURE 16. INPUT COMMON-MODE RETURN LOSS 0 -5 -10 -15 -20 -25 -30 -35 0 ...
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IN[k] [P,N] FIGURE 22. FUNCTIONAL DIAGRAM OF A SINGLE CHANNEL WITHIN THE QLx4600-SL30 Operation The QLx4600-SL30 is an advanced quad lane-extender for high-speed interconnects. A functional diagram of one of the four channels in the QLx4600-SL30 is shown in Figure ...
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V DD IN[k] P 50Ω 50Ω IN[k] N FIGURE 24. CML INPUT EQUIVALENT CIRCUIT FOR THE QLx4600-S30 V DD 52Ω 52Ω FIGURE 25. CML OUTPUT EQUIVALENT CIRCUIT FOR THE QLx4600-S30 NOTE: The load value of 52Ω is used to internally ...
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TABLE 1. DESCRIPTIONS OF PINS USED TO SET EQUALIZATION BOOST LEVEL PIN NAME PIN NUMBER DESCRIPTION DI 16 Serial data input, CMOS logic. Input for serial data stream to program internal registers controlling the boost for all four equalizers. Synchronized ...
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Control Pin Boost Setting When register 1 of the QLx4600-SL30 is zero (the default state on power-up), the voltages at the CP pins are used to determine the boost level of each channel. For each of the four channels, k, ...
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TABLE 4. DESCRIPTION OF INTERNAL SERIAL REGISTERS EQUALIZER REGISTER CHANNEL 1 1 Serial Bus Programming Pins ...
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ENB t CLK DI FIGURE 27. TIMING DIAGRAM FOR PROGRAMMING THE INTERNAL REGISTERS OF THE QLx4600-SL30 Programming Multiple QLx4600-SL30 Devices The serial bus interface provides a simple means of setting the equalizer boost levels with a minimal amount of board ...
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ENB t SCK CLK DO FIGURE 29. TIMING DIAGRAM FOR DI/DO CARRYOVER Serial Register Data QLx4600-SL30 (A) ENB DI CLK DO Clock ENB FIGURE 30. SERIAL BUS PROGRAMMING MULTIPLE QLx4600-SL30 DEVICES USING DI/DO CARRYOVER ENB t SCK CLK t t ...
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Detection Threshold (DT) Pin Functionality The QLx4600-SL30 is capable of maintaining periods of line silence on any of its four channels by monitoring each channel for loss of signal (LOS) conditions and subsequently muting the outputs of a respective channel ...
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Typical Application Reference Designs Figures 33 and 34 show reference design schematics for a QLx4600-SL30 evaluation board with an SMA connector interface. Figure 33 shows the schematic for the case when the equalizer boost level is set via the CP ...
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Typical Application Reference Designs Figures 33 and 34 show reference design schematics for a QLx4600-SL30 evaluation board with an SMA connector interface. Figure 33 shows the schematic for the case when the equalizer boost level is set via the CP ...
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... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries ...
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Package Outline Drawing L46.4x7 46 LEAD THIN QUAD FLAT NO-LEAD PLASTIC PACKAGE (TQFN) Rev 0, 9/09 4.00 6 PIN 1 INDEX AREA (4X) 0.05 TOP VIEW 0.70 ±0.05 SIDE VIEW ( 3. 2.50 5.50 ...