ACPL-796J-000E Avago Technologies US Inc., ACPL-796J-000E Datasheet - Page 6

• Manufacturer Part Number: ACPL-796J-000E
• Description: Isolated Sigma-Delta Modulator, LF
• Manufacturer: Avago Technologies US Inc.

Specifications of ACPL-796J-000E

• Amplifier Type: Isolation
• Number Of Circuits: 1
• Current - Input Bias: 500nA
• Voltage - Input Offset: 3000µV
• Current - Supply: 14mA
• Voltage - Supply, Single/dual (±): 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 105°C
• Mounting Type: Surface Mount
• Package / Case: 16-SOIC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Output Type: -
• Current - Output / Channel: -
• -3db Bandwidth: -
• Slew Rate: -
• Gain Bandwidth Product: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 7. lectrical Specifications
Unless otherwise noted, T
V
Notes:
1. All Typical values are at T
2. Beyond the full-scale input range the data output is either all zeroes or all ones.
3. Because of the switched-capacitor nature of the isolated modulator, time averaged values are shown.
4. Signal frequency of 543 Hz is used as a reference frequency for coherent sampling.
5. Ensured by design.
6
Parameter
STATIC CHA ACT ISTICS
Resolution
Integral Nonlinearity
Differential Nonlinearity
Offset Error
Offset Drift vs.
Temperature
Offset Drift vs. V
Gain Error
Gain Error Drift vs.
Temperature
Gain Error Drift vs. V
A AL
Full-Scale Differential
Voltage Input Range
Average Input Bias Current
Average Input Resistance
Input Capacitance
DY A IC CHA ACT ISTICS
Signal-to-Noise Ratio
Signal-to-
(Noise + Distortion)
Ratio
Effective Number of Bits
Isolation Transient Immunity CMR
Common-Mode Rejection
Ratio
DI ITAL I P TS A D
Input High Voltage
Input Low Voltage
Input Current
Input Capacitance
Output High Voltage
Output Low Voltage
P W S PPLY
V
V
IN
DD1
DD2
– = 0 V (single-ended connection); tested with Sinc
Supply Current
Supply Current
I P TS
DD1
TP TS
DD1
A
= 25°C, V
Symbol
INL
DNL
V
TCV
G
TCG
FSR
I
R
C
SNR
SNDR
ENOB
CMRR
V
V
I
C
V
V
I
I
A
INA
IND
DD1
DD2
IN
OS
INA
IH
IL
IND
OH
OL
E
= –40°C to +105°C, V
OS
E
DD1
16
–15
–25
–25
–0.9
–1
–2
–1
74
65
68
65
0.8 ×
V
V
– 0.2
V
– 0.15
= 5 V, V
DD2
DD2
DD2
in.
DD2
Typ.
3
3
3
120
60
110
±320
–0.5
33
8
80
75
75
12
25
74
±0.5
6
V
– 0.1
V
– 0.1
14
6
5
DD2
DD2
= 5 V.
[1]
DD1
15
25
25
0.9
4.5
3.5
2
1
0.2 ×
V
0.4
19
8
7
DD2
ax.
= 4.5 V to 5.5 V, V
3
filter, 256 decimation ratio, f
Bits
LSB
LSB
LSB
mV
PV/°C
PV/V
%
%
ppm/°C
PV/V
mV
PA
k:
pF
dB
dB
dB
Bits
kV/PV
dB
V
V
PA
pF
V
V
V
mA
mA
mA
nits
Test Conditions otes
Decimation filter output set to 16 bits
T
T
V
No missing codes, guaranteed by design;
see Definitions section
T
T
see Definitions section
T
V
V
Across V
Across V
V
T
T
T
T
see Definitions section
V
Note 5
Note 5
V
V
I
V
V
OUT
A
A
A
A
A
A
A
A
A
IN
IN
DD1
IN
CM
DD2
DD2
DD2
DD2
= –40°C to +85°C; see Definitions section
= 85°C to 105°C
= –40°C to +105°C; see Definitions section
= –40°C to +105°C, V
= 25°C, V
= –40°C to +105°C; see Definitions section
= –40°C to +105°C; see Definitions section
= –40°C to +85°C
= –40°C to +105°C, V
+ = –250 mV to +250mV
+ = –200 mV to +200 mV, 543 Hz, sine wave; Note 4
= V
= 1 kV; See Definitions section
= +200 PA
DD2
= 5V, V
= 5 V supply, I
= 3.3 V supply, I
= 5 V supply
= 3.3 V supply
IN
IN
IN
+ – V
= 3 V to 5.5 V, V
+ or V
+ or V
IN
DD2
+ = –250 to +250 mV
IN
–; Note 2
IN
IN
= 5V, V
– to GND1; Note 3
– to GND1
OUT
OUT
IN
IN
IN
= –200 PA
MCLKIN
+ = 0 V; Note 3
+ = –250 to +250 mV;
+ = –250 mV to +250 mV
= –200 PA
IN
+ = –200 mV to +200 mV, and
= 10 MHz.
Fig.
6
7, 8
7, 8
7
9, 10
11, 12