71M6523-DB Maxim Integrated Products, 71M6523-DB Datasheet - Page 9
![no-image](/images/manufacturer_photos/0/4/417/maxim_integrated_products_sml.jpg)
71M6523-DB
Manufacturer Part Number
71M6523-DB
Description
Power Management Modules & Development Tools 71M6521D 68 QFN DEMO BOARD
Manufacturer
Maxim Integrated Products
Datasheet
1.71M6521DE-DB.pdf
(138 pages)
71M652X Software User’s Guide
Table 5-4: Current Sensing Options ............................................................................................................................... 42
Table 5-5: Compensation Features ................................................................................................................................ 42
Table 5-6: Power Registers and Pulse Output Features ................................................................................................ 43
Table 5-7: Creep Functions ............................................................................................................................................ 44
Table 5-8: Operating Modes ........................................................................................................................................... 44
Table 5-9: Calibration and Various Services .................................................................................................................. 46
Table 5-10: Interrupt Service Routines ........................................................................................................................... 50
Table 5-11: Interrupt Priority Assignment ....................................................................................................................... 51
Table 5-12: MPU Memory Location ................................................................................................................................ 78
Table 5-13: Frequency over Temperature ...................................................................................................................... 80
Table 6-1: Speed Advantage Summary ....................................................................................................................... 101
Table 6-2: Stretch Memory Cycle Width ....................................................................................................................... 104
Table 6-3: Internal Data Memory Map .......................................................................................................................... 105
Table 6-4: Special Function Registers Locations ......................................................................................................... 105
Table 6-5: Special Function Registers Reset Values ................................................................................................... 107
Table 6-6: SFRs Specific to the 652X .......................................................................................................................... 109
Table 6-7: Notes on Data Addressing Modes ............................................................................................................... 109
Table 6-8: Notes on Program Addressing Modes ........................................................................................................ 109
Table 6-9: Arithmetic Operations .................................................................................................................................. 110
Table 6-10: Logic Operations ....................................................................................................................................... 111
Table 6-11: Data Transfer Operations .......................................................................................................................... 112
Table 6-12: Program Branches .................................................................................................................................... 113
Table 6-13: Boolean Manipulations .............................................................................................................................. 113
Table 6-14: Instruction Set in Hexadecimal Order ........................................................................................................ 114
Table 6-15: Instruction Set in Hexadecimal Order ........................................................................................................ 115
Table 6-16: Instruction Set in Hexadecimal Order ........................................................................................................ 116
Table 6-17: Instructions Affecting Flags ....................................................................................................................... 117
Table 6-18: PSW Register Flags .................................................................................................................................. 119
Table 6-19: PSW Bit Functions .................................................................................................................................... 119
Table 6-20: Register Bank Location ............................................................................................................................. 120
Table 6-21: The TMOD Register .................................................................................................................................. 121
Table 6-22: The TMOD Register Bits Description ........................................................................................................ 121
Table 6-23: Timers/Counters Mode Description ........................................................................................................... 121
Table 6-24: The TCON Register .................................................................................................................................. 121
Table 6-25: The TCON Register Bit Functions ............................................................................................................. 122
Table 6-26: Timer Modes ............................................................................................................................................. 122
Table 6-27: The S0CON Register ................................................................................................................................ 123
Table 6-28: The S0CON Bit Functions ......................................................................................................................... 123
Table 6-29: Serial Port 0 Modes ................................................................................................................................... 124
Revision 1.7
9 of 138
TERIDIAN Proprietary
© Copyright 2005-2007 TERIDIAN Semiconductor Corporation