OM13006,598 NXP Semiconductors, OM13006,598 Datasheet - Page 156

• Manufacturer Part Number: OM13006,598
• Description: BOARD EVAL EM773 METER EU PLUG
• Manufacturer: NXP Semiconductors
• Type: Other Power Managementr

Specifications of OM13006,598

• Design Resources: Plug Meter Schematics, Gerber Files USB Dongle Schematics, Gerber Files
• Main Purpose: Power Management, Energy/Power Meter
• Embedded: Yes, MCU, 32-Bit
• Utilized Ic / Part: EM773FHN33,551
• Interface Type: USB
• Maximum Operating Temperature: + 150 C
• Operating Supply Voltage: 1.8 V to 3.6 V
• Product: Power Management Development Tools
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Primary Attributes: -
• Secondary Attributes: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• For Use With/related Products: EM773, OL2381
• Other names: 568-6681

NXP Semiconductors
12.5 Description
12.6 Pin description
Table 147. Counter/timer pin description
12.7 Clocking and power control
12.8 Register description
UM10415
User manual
Pin
CT16B0_CAP0
CT16B0_MAT[2:0]
Each Counter/timer is designed to count cycles of the peripheral clock (PCLK) or an
externally supplied clock and can optionally generate interrupts or perform other actions at
specified timer values based on four match registers. Each counter/timer also includes
one capture input to trap the timer value when an input signal transitions, optionally
generating an interrupt.
In PWM mode, three match registers on CT16B0 can be used to provide a single-edge
controlled PWM output on the match output pins. It is recommended to use the match
registers that are not pinned out to control the PWM cycle length.
Table 147
The peripheral clocks (PCLK) to the 16-bit timers are provided by the system clock (see
Figure
(Table
The 16-bit counter/timer0 contains the registers shown in
descriptions follow.
Type
Input
Output
17) for power savings.
3). These clocks can be disabled through bit 7 and 8 in the AHBCLKCTRL register
gives a brief summary of each of the counter/timer related pins.
Description
Capture Signal:
A transition on a capture pin can be configured to load the Capture Register with the
value in the counter/timer and optionally generate an interrupt.
Counter/Timer block can select a capture signal as a clock source instead of the PCLK
derived clock. For more details see
External Match Outputs of CT16B0:
When a match register of CT16B0 (MR3:0) equals the timer counter (TC), this output
can either toggle, go LOW, go HIGH, or do nothing. The External Match Register
(EMR) and the PWM Control Register (PWMCON) control the functionality of this
output.
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 10 September 2010
Chapter 12: EM773 16-bit counter/timer (CT16B0)
Section
12.8.11.
Table
148. More detailed
UM10415
© NXP B.V. 2010. All rights reserved.
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