MEDIA5200KIT1 Freescale Semiconductor, MEDIA5200KIT1 Datasheet - Page 47
MEDIA5200KIT1
Manufacturer Part Number
MEDIA5200KIT1
Description
MCU, MPU & DSP Development Tools MEDIA5200 SW DEVT SYSTEM
Manufacturer
Freescale Semiconductor
Specifications of MEDIA5200KIT1
Processor To Be Evaluated
MPC5200B
Data Bus Width
32 bit
Interface Type
Ethernet, USB
Lead Free Status / Rohs Status
Not Compliant
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1.3.16
1.3.16.1
Freescale Semiconductor
1
Bit Clock cycle time.
Sym
1
2
3
4
5
6
7
8
(CLKPOL=0)
(SyncPol = 1)
(CLKPOL=1)
(SyncPol = 0)
FrameSync
FrameSync
PSC
Table 42. Timing Specifications—8-, 16-, 24-, and 32-bit CODEC / I
Codec Mode (8-,16-, 24-, and 32-bit)/I
Figure 37. Timing Diagram — 8-, 16-, 24-, and 32-bit CODEC / I
Output
Output
Output
Output
Bit Clock cycle time, programmed in CCS register
Output
BitClk
BitClk
Input
TxD
RxD
FrameSync invalid after clock edge
Output Data valid after clock edge
FrameSync valid after clock edge
Input Data setup time
5
Bit Clock rise time
Bit Clock fall time
Clock duty cycle
Description
Output timing is specified at a nominal 50 pF load.
7
8
2
1
MPC5200B Data Sheet, Rev. 4
2
6
NOTE
4
3
4
3
2
S Mode
40.0
Min
6.0
—
—
—
—
—
—
Typ
50
—
—
—
—
—
—
—
2
S Master Mode
2
S Master Mode
Max
7.9
7.9
8.4
8.4
9.3
—
—
—
Units
%
ns
ns
ns
ns
ns
ns
ns
(1)
SpecID
A15.1
A15.2
A15.3
A15.4
A15.5
A15.6
A15.7
A15.8
47
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