MEDIA5200KIT1 Freescale Semiconductor, MEDIA5200KIT1 Datasheet - Page 48
MEDIA5200KIT1
Manufacturer Part Number
MEDIA5200KIT1
Description
MCU, MPU & DSP Development Tools MEDIA5200 SW DEVT SYSTEM
Manufacturer
Freescale Semiconductor
Specifications of MEDIA5200KIT1
Processor To Be Evaluated
MPC5200B
Data Bus Width
32 bit
Interface Type
Ethernet, USB
Lead Free Status / Rohs Status
Not Compliant
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1
Sym
1
2
3
4
5
6
Bit Clock cycle time.
(CLKPOL=0)
(SyncPol = 1)
(CLKPOL=1)
(SyncPol = 0)
FrameSync
FrameSync
Table 43. Timing Specifications — 8-, 16-, 24-, and 32-bit CODEC / I
Figure 38. Timing Diagram — 8-, 16-, 24-, and 32-bit CODEC / I
Output
BitClk
BitClk
Input
Input
Input
Input
Input
TxD
RxD
Output Data valid after clock edge
FrameSync setup time
Input Data setup time
Input Data hold time
Bit Clock cycle time
Clock duty cycle
Description
Output timing is specified at a nominal 50 pF load.
4
5
2
3
1
MPC5200B Data Sheet, Rev. 4
2
6
NOTE
40.0
Min
1.0
1.0
1.0
—
—
Typ
50
—
—
—
—
—
2
S Slave Mode
2
S Slave Mode
Max
14.0
—
—
—
—
—
Freescale Semiconductor
Units
%
ns
ns
ns
ns
ns
(1)
SpecID
A15.10
A15.11
A15.12
A15.13
A15.14
A15.9
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