LS-E250E-BASE-PC-N Lattice, LS-E250E-BASE-PC-N Datasheet
LS-E250E-BASE-PC-N
Specifications of LS-E250E-BASE-PC-N
Related parts for LS-E250E-BASE-PC-N
LS-E250E-BASE-PC-N Summary of contents
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... LatticeMico32/DSP Development Board for LatticeECP2 User’s Guide June 2009 Revision: EB26_02.6 ...
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... Features • Lattice ECP2-50 FPGA with 48 kLUTs, 387 kbit of Embedded Block RAM, 18 sysDSP™ blocks, 72 18x18 multi- pliers, 6 PLLs, and 500 user I/O pins • Lattice MachXO™ with 640 LUTs and 6.1 kbit of RAM • Serial Flash with at least 8 Mbit for non-volatile storage of FPGA configuration data. ...
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... Be sure to check the Lattice web site for updates to this document as well. These documents can be downloaded from the Lattice web site at: www.latticesemi.com/boards. Select the FPGA/FPSC Boards -> LatticeMico32/DSP Development board for LatticeECP2 and click on the User Manu- als link. LatticeMico32/DSP Development Board for LatticeECP2 User’s Guide www.latticesemi.com/boards (and navigate to the correct board) to fi ...
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... FPGA Programmed Visual indications of operation are: • Left to Right and Right to Left scanning of the 8 LEDs. • Upcount and roll over of the 7 segment displays from decimal at ~1 second intervals. Jumper Open Backlight is off. TMS Switch Off (Down) LatticeECP2-50 FPGA can be programmed. Jumper ...
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... Lattice Semiconductor Peripheral Interfaces This section describes all peripheral interfaces of the LatticeMico32/DSP Development Board for LatticeECP2 in alphabetical order. Figure 2 shows the position of peripheral interfaces available on the board. Figure 2. Peripheral Interfaces (Version 1 Board Shown in this Figure) Power Plug Connector 2.5V Testpoint 3.3V ...
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... A 25MHz oscillator supplies the FPGA (pin AD15), the CPLD (pin A8), the Ethernet controller and the Expansion Connector (pin 29 of X12). The frequency can be measured via testpoint CLK. To generate other clock frequencies use the PLLs of the FPGA. You can find detailed information on the usage of the PLLs on the Lattice website and in the LatticeECP2/M Family Data Sheet ...
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... DDR_A0 110 DDR_A2 108 DDR_A4 106 DDR_A6 102 DDR_A8 115 DDR_A10 99 DDR_A12 117 DDR_BA0 Table 5. DDR SODIMM Socket (X4) - Other Signals Pin Signal Name 35 DDR_CK0+ 160 DDR_CK1+ 96 DDR_CKE0 118 DDR_RAS# 120 DDR_CAS# 122 DDR_S1# LatticeMico32/DSP Development Board for LatticeECP2 User’s Guide ...
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... — 22 — 24 — 26 — 28 — 30 — 32 — 34 — for LatticeECP2 User’s Guide FPGA Pin N25 W25 Y26 R25 P26 R26 V26 V24 P25 W24 Signal Name FPGA Pin NC (coding) — EXPCON_IO29 H4 EXPCON_IO31 H6 EXPCON_IO33 H8 EXPCON_IO35 G2 EXPCON_IO37 G4 EXPCON_IO39 F2 EXPCON_IO41 F6 EXPCON_IO43 E2 EXPCON_IO45 E4 GND — ...
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... DIP switch SW0302 controls the device to be configured: the FPGA or the MachXO (in top position), the MachXO is selected; if off, the FPGA is selected. The ispVM System software can be downloaded from the Lattice web site at: www.latticesemi.com/ispvm. Note: Do not change the switch when the configuration of a device is in progress! 1 ...
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... Find the jacks X15 and X16 for connecting SATA cables on the right side of the board. This provides a convenient method for evaluating or using LVDS signals with the FPGA. This board does not support implementation of a full SATA solution. These SATA jacks have differential nets with high-speed signals connected to them. See Table 11 for SATA pinning information. The positive signal is connected with a plus (+), the negative with a minus (-). Every differential signal pair can act as receiver or transmitter depending on the confi ...
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... For more information, see the power supply information in the Components section of this document. Test Points In order to check the various voltage levels used, several test points are provided. There is one test point for 1.2V, 2.5V, 3.3V, one for ground, and one for accessing the 25MHz oscillator. The 25MHz clock signal can be checked with another test point ...
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... HPE_RESOUT# USB Configuration Connector In addition to the ispDOWNLOAD connector, the FPGA and the MachXO can also be configured by a standard USB connection. The USB target connector is wired to the Cypress CY7C68013A device (U0301). This programming method requires the use of the ispVM System software. This can be downloaded from the Lat- tice web site at: www ...
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... VGA RD0 and VGA RD1 are both connected to pin 1, but have different series resistors (see Figure 4). Thus bit VGA interface is realized. Figure 4 shows the connection of the RGB signals. The FPGA is responsible for gen- erating correct HSYNC and VSYNC sweep frequencies. Understand the SYNC frequencies of the VGA monitor being connected to the VGA plug and adjust the FPGA frequencies as required. Table 16. VGA Connector X1B Pin Defi ...
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... Lattice Semiconductor Figure 4. VGA Connector LatticeMico32/DSP Development Board for LatticeECP2 User’s Guide 14 ...
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... USB for Configuration LatticeMico32/DSP Development Board Audio Ethernet RS232 Line In 10/100M Connector Line Out LCD Sigma Delta Connector DAC Connector 15 for LatticeECP2 User’s Guide Mini USB VGA OTG Connector Connector USB Host Connector DDR SDRAM Sockel SATA LVDS Connectors Expansion Connector ...
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... SEG_CA0# The signals of the 7-segment display are low-active, which means that with a logic ‘0’, the segment is lit. SEG A# ... SEG F# and SEG DP# drive not only the two 7-segment displays, but also the LCD. To write different data to these three components, the user must drive the signals alternately to the components. This can be realized with the sig- nals SEG CA0#, SEG CA1# and LCD ENABLE ...
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... TST_ROW2 TST_ROW3 To query all keys of the matrix, you must poll the column driver signals (TST COL0, TST COL1, and TST COL2). If you press a key, a logic ‘1’ appears in the corresponding row. The following diagram explains the functionality: Figure 6. Polling of the Key Matrix You do not need the polling method if only four keys are used ...
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... Figure 7. Components (Version 1 board Shown in this Figure) Ethernet PHY CPLD MachXO USB Configuration Controller LatticeMico32/DSP Development Board USB Host/ AC‘97 Audio Target/OTG Codec Controller SPI Reset Asynchronous Flash Controller SRAM 18 for LatticeECP2 User’s Guide FPGA LFEC250 Prototyping Area Parallel Flash ...
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... VCC3V3 TP0985 VCC3V3 TP09109 VCC3V3 TP0924 GND TP0948 GND TP0972 GND TP0996 GND TP09120 GND LatticeMico32/DSP Development Board for LatticeECP2 User’s Guide FPGA Pin LRF Pin Signal Name A15 TP0902 BB3V3_IO1 C15 TP0904 BB3V3_IO3 A16 TP0906 BB3V3_IO5 E16 TP0908 BB3V3_IO7 ...
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... They are wired as one memory with a 32-bit data bus and a depth of 256 k. The 18-bit address bus, the data bus and the control signals are connected directly to the FPGA. The 18-bit address bus, named MEMORY_A0 through MEMORY_A17, addresses word (4 bytes) locations. ...
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... MEMORY_DQ18 13 MEMORY_DQ20 15 MEMORY_DQ22 29 MEMORY_DQ24 31 MEMORY_DQ26 35 MEMORY_DQ28 37 MEMORY_DQ30 Table 26. Control Signals of the Asynchronous SRAM Chips U0404 and U0405 SRAM Pin Signal Name SRAM Pin 17 MEMORY_WE# 39 SRAM_BE0# 6 SRAM_CE# MachXO The LCMXO640 is a non-volatile, instant-on, reprogrammable logic device. It supports “background programming” called TransFR™ (i.e., the device can be programmed while in operation). ...
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... As with the SRAM, a 32-bit data bus is realized with these two devices. Thus, Flash can be accessed as a 8Mx32 memory. The 23-bit address bus, the data bus and the control signals are connected directly to the FPGA. The 23-bit address bus, named MEMORY_A0 through MEMORY_A22, addresses word (4 bytes) locations ...
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... The warnings can be avoided by either commenting out these byte enable outputs, or assigning them to unused I/O. Table 28. Address Signals of the Flash Chips U0402 and U0403 Flash Pin Signal Name ...
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... Lattice Semiconductor Table 31. Control Signals of the Flash Chips U0402 and U0403 Flash Pin Signal Name 34 MEMORY_OE# 32 FLASH_CE# 14 FLASH_RESET 53 FLASH_BYTE# SPI Flash The LatticeECP2-50 FPGA is an SRAM-based programmable device, and is therefore volatile. In order for automatically configured upon power-up, a non-volatile 16 Mbit SPI Flash device is provided. The SPI Flash can be programmed with confi ...
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... Circuit diagrams for the localization of errors can be found in the appendix. Electrical Specifications Power requirement: regulated 5V DC Input current: 2000 mA Mechanical Specifications Dimensions: 160 mm [L] x 160 mm [ [H] Net weight: 160 g Temperature range LatticeMico32/DSP Development Board for LatticeECP2 User’s Guide 2 C interface ...
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... JTAG_INIT PROGRAM# SISPI SPIDO SPIFASTN# DDR_A0 DDR_A1 DDR_A10 DDR_A11 DDR_A12 DDR_A13 DDR_A2 26 for LatticeECP2 User’s Guide Area 7-Segment Display 7-Segment Display 7-Segment Display 7-Segment Display 7-Segment Display 7-Segment Display 7-Segment Display 7-Segment Display 7-Segment Display 7-Segment Display AC97 Audio Codec ...
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... DDR_DQ2 DDR_DQ20 DDR_DQ21 DDR_DQ22 DDR_DQ23 DDR_DQ24 DDR_DQ25 DDR_DQ26 DDR_DQ27 DDR_DQ28 DDR_DQ29 DDR_DQ3 27 for LatticeECP2 User’s Guide Area DDR SDRAM DDR SDRAM DDR SDRAM DDR SDRAM DDR SDRAM DDR SDRAM DDR SDRAM DDR SDRAM DDR SDRAM DDR SDRAM DDR SDRAM DDR SDRAM ...
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... ETH_RXD3 ETH_RXDV ETH_RXER ETH_TXCLK ETH_TXD0 ETH_TXD1 ETH_TXD2 ETH_TXD3 ETH_TXEN ETH_TXER CARDSEL# EXPCON_CLKIN 28 for LatticeECP2 User’s Guide Area DDR SDRAM DDR SDRAM DDR SDRAM DDR SDRAM DDR SDRAM DDR SDRAM DDR SDRAM DDR SDRAM DDR SDRAM DDR SDRAM DDR SDRAM DDR SDRAM ...
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... EXPCON_IO37 EXPCON_IO38 EXPCON_IO39 EXPCON_IO4 EXPCON_IO40 EXPCON_IO41 EXPCON_IO42 EXPCON_IO43 EXPCON_IO44 EXPCON_IO45 EXPCON_IO5 EXPCON_IO6 29 for LatticeECP2 User’s Guide Area Expansion Connector Expansion Connector Expansion Connector Expansion Connector Expansion Connector Expansion Connector Expansion Connector Expansion Connector Expansion Connector Expansion Connector Expansion Connector Expansion Connector ...
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... MEMORY_A6 MEMORY_A7 MEMORY_A8 MEMORY_A9 MEMORY_DQ0 MEMORY_DQ1 MEMORY_DQ10 MEMORY_DQ11 MEMORY_DQ12 MEMORY_DQ13 MEMORY_DQ14 MEMORY_DQ15 MEMORY_DQ16 MEMORY_DQ17 MEMORY_DQ18 MEMORY_DQ19 30 for LatticeECP2 User’s Guide Area Expansion Connector Expansion Connector Expansion Connector Flash/SRAM Flash/SRAM Flash/SRAM Flash/SRAM Flash/SRAM Flash/SRAM Flash/SRAM Flash/SRAM Flash/SRAM Flash/SRAM Flash/SRAM Flash/SRAM Flash/SRAM ...
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... SRAM_CE# CLK_FPGA CLK_FPGA BB3V3_CLK0- BB3V3_CLK0+ BB3V3_IO0 BB3V3_IO1 BB3V3_IO10 BB3V3_IO11 BB3V3_IO12 BB3V3_IO13 BB3V3_IO14 BB3V3_IO15 BB3V3_IO16 BB3V3_IO17 BB3V3_IO18 BB3V3_IO19 BB3V3_IO2 31 for LatticeECP2 User’s Guide Area Flash/SRAM Flash/SRAM Flash/SRAM Flash/SRAM Flash/SRAM Flash/SRAM Flash/SRAM Flash/SRAM Flash/SRAM Flash/SRAM Flash/SRAM Flash/SRAM Flash/SRAM Flash/SRAM Flash/SRAM Flash/SRAM Flash/SRAM ...
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... MACHXO_IO12 MACHXO_IO13 MACHXO_IO14 MACHXO_IO15 MACHXO_IO2 MACHXO_IO3 MACHXO_IO4 MACHXO_IO5 MACHXO_IO6 32 for LatticeECP2 User’s Guide Area FPGA Prototyping Area FPGA Prototyping Area FPGA Prototyping Area FPGA Prototyping Area FPGA Prototyping Area FPGA Prototyping Area FPGA Prototyping Area FPGA Prototyping Area FPGA Prototyping Area ...
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... USB_GPIO15 USB_GPIO16 USB_GPIO17 USB_GPIO18 USB_GPIO19 USB_GPIO2 USB_GPIO20 USB_GPIO21 USB_GPIO22 USB_GPIO23 USB_GPIO24 USB_GPIO25 USB_GPIO26 USB_GPIO27 USB_GPIO28 USB_GPIO3 USB_GPIO4 USB_GPIO5 33 for LatticeECP2 User’s Guide Area MachXO MachXO MachXO Reset Reset RS232 RS232 RS232 RS232 SATA SATA SATA SATA SATA SATA SATA SATA ...
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... AD22 AA17 AF22 AE21 AF23 AE22 AF20 AF24 AE23 AF21 Ordering Information Description LatticeMico32/DSP Development Board for LatticeECP2 Technical Support Assistance Hotline: 1-800-LATTICE (North America) +1-503-268-8001 (Outside North America) e-mail: techsupport@latticesemi.com Internet: www.latticesemi.com LatticeMico32/DSP Development Board Signal Name USB_GPIO6 USB_GPIO7 USB_GPIO8 ...
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... Address Signals of the Asynchronous SRAM Chips U0404 and 02.3 U0405 table - updated FPGA Pin information for MEMORY_A1 and MEMORY_A2. Address Signals of the Flash Chips U0402 and U0403 table - updated FPGA Pin information for MEMORY_A1 and MEMORY_A2. 02.4 Updated photo used in Updated photo used in Components figure. ...
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... Lattice Semiconductor Appendix A. Board Version 1 Schematic Figure 9. LatticeMico32/DSP Development Board for LatticeECP2 User’s Guide ...
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... Lattice Semiconductor Figure 10 LatticeMico32/DSP Development Board for LatticeECP2 User’s Guide ...
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... Lattice Semiconductor Figure 11. Vcc 43 Vio 29 LatticeMico32/DSP Development Board Vss Vcc Vss Vss Vio Vss for LatticeECP2 User’s Guide ...
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... Lattice Semiconductor Figure 12 LatticeMico32/DSP Development Board TST_COL2 TST_COL1 TST_COL0 C. SEG_CA0# C. SEG_CA1#_X 39 for LatticeECP2 User’s Guide ...
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... Lattice Semiconductor Figure 13 LatticeMico32/DSP Development Board for LatticeECP2 User’s Guide ...
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... Lattice Semiconductor Figure 14. LatticeMico32/DSP Development Board for LatticeECP2 User’s Guide 2 2 ...
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... Lattice Semiconductor Figure 15 LatticeMico32/DSP Development Board for LatticeECP2 User’s Guide ...
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... Lattice Semiconductor Figure 16 LatticeMico32/DSP Development Board for LatticeECP2 User’s Guide ...
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... Lattice Semiconductor Figure 17 LatticeMico32/DSP Development Board + + + for LatticeECP2 User’s Guide ...
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... Lattice Semiconductor Figure 18 LatticeMico32/DSP Development Board for LatticeECP2 User’s Guide ...
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... Lattice Semiconductor Appendix B. Board Version 2 Schematic Figure 19. LatticeMico32/DSP Development Board for LatticeECP2 User’s Guide 46 ...
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... Lattice Semiconductor Figure 20. LatticeMico32/DSP Development Board for LatticeECP2 User’s Guide ...
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... Lattice Semiconductor Figure 21 LatticeMico32/DSP Development Board for LatticeECP2 User’s Guide ...
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... Lattice Semiconductor Figure 22. Vcc 43 Vio 29 LatticeMico32/DSP Development Board Vss Vcc Vss 52 43 Vss Vio Vss for LatticeECP2 User’s Guide ...
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... Lattice Semiconductor Figure 23. TST_COL2 5 3 TST_COL1 TST_COL0 LatticeMico32/DSP Development Board C. SEG_CA0# SEG_CA1# for LatticeECP2 User’s Guide ...
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... Lattice Semiconductor Figure 24 LatticeMico32/DSP Development Board for LatticeECP2 User’s Guide ...
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... Lattice Semiconductor Figure 25. LatticeMico32/DSP Development Board for LatticeECP2 User’s Guide ...
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... Lattice Semiconductor Figure 26 LatticeMico32/DSP Development Board for LatticeECP2 User’s Guide ...
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... Lattice Semiconductor Figure 27 LatticeMico32/DSP Development Board for LatticeECP2 User’s Guide ...
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... Lattice Semiconductor Figure 28 LatticeMico32/DSP Development Board + + for LatticeECP2 User’s Guide ...
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... Lattice Semiconductor Figure 29 LatticeMico32/DSP Development Board for LatticeECP2 User’s Guide ...
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... Lattice Semiconductor Figure 30. LatticeMico32/DSP Development Board for LatticeECP2 User’s Guide 57 ...