5M2210ZF256C5N Altera, 5M2210ZF256C5N Datasheet - Page 59
5M2210ZF256C5N
Manufacturer Part Number
5M2210ZF256C5N
Description
ALTERA
Manufacturer
Altera
Series
MAX Vr
Datasheets
1.DK-DEV-5M570ZN.pdf
(30 pages)
2.DK-DEV-5M570ZN.pdf
(164 pages)
3.DK-DSP-3SL150N.pdf
(80 pages)
4.5M240ZT100C5N.pdf
(72 pages)
Specifications of 5M2210ZF256C5N
Cpld Type
FLASH
No. Of Macrocells
1700
No. Of I/o's
271
Propagation Delay
7.5ns
Global Clock Setup Time
4.6ns
Frequency
201.1MHz
Supply Voltage Range
1.71V To 1.89V
Programmable Type
In System Programmable
Delay Time Tpd(1) Max
7.0ns
Voltage Supply - Internal
1.71 V ~ 1.89 V
Number Of Logic Elements/blocks
2210
Number Of Macrocells
1700
Number Of Gates
-
Number Of I /o
203
Operating Temperature
0°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
256-LBGA
Rohs Compliant
Yes
Lead Free Status / Rohs Status
Vendor undefined / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
5M2210ZF256C5N
Manufacturer:
INTEL22
Quantity:
502
Part Number:
5M2210ZF256C5N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Chapter 3: DC and Switching Characteristics for MAX V Devices
Timing Model and Specifications
Table 3–17. Device Performance for MAX V Devices
January 2011 Altera Corporation
LE
UFM
Notes to
(1) This design is a binary loadable up counter.
(2) This design is configured for read-only operation in Extended mode. Read and write ability increases the number of logic elements (LEs) used.
(3) This design is configured for read-only operation. Read and write ability increases the number of LEs used.
(4) This design is asynchronous.
(5) The I
Resource
Used
Table
2
C megafunction is verified in hardware up to 100-kHz serial clock line rate.
Performance
16-bit counter
64-bit counter
16-to-1 multiplexer
32-to-1 multiplexer
16-bit XOR function
16-bit decoder with
single address line
512 × 16
512 × 16
512 × 8
512 × 16
3–17:
Design Size and
Function
Final timing numbers are based on actual device operation and testing. These
numbers reflect the actual performance of the device under the worst-case voltage
and junction temperature conditions.
Table 3–16. Timing Model Status for MAX V Devices
Table 3–17
performance values were obtained with the Quartus II software compilation of
megafunctions.
5M40Z
5M80Z
5M160Z
5M240Z
5M570Z
5M1270Z
5M2210Z
(1)
(1)
SPI
Parallel
I
lists the MAX V device performance for some common designs. All
Device
Mode
2
None
C
—
—
—
—
—
—
(3)
(3)
(2)
Resources Used
142
LEs
16
64
11
24
37
73
5
5
3
Blocks
UFM
0
0
0
0
0
0
1
1
1
1
5M40Z/ 5M80Z/ 5M160Z/
Preliminary
100
184.1
83.2
17.4
12.5
10.0
5M240Z/ 5M570Z
9.0
9.2
9.7
C4
(4)
v
v
v
v
v
v
v
(5)
100
C5, I5
118.3
80.5
20.4
25.3
16.1
16.1
10.0
9.7
(4)
Performance
(5)
100
5M1270Z/ 5M2210Z
247.5
154.8
10.0
8.0
9.0
6.6
6.6
8.0
C4
(4)
(5)
MAX V Device Handbook
Final
—
—
—
—
—
—
—
100
C5, I5
201.1
125.8
11.4
10.0
9.3
8.2
8.2
8.0
(4)
(5)
3–11
MHz
MHz
MHz
MHz
MHz
Unit
kHz
ns
ns
ns
ns