EVAL-ADAU1761Z Analog Devices Inc, EVAL-ADAU1761Z Datasheet - Page 4

• Manufacturer Part Number: EVAL-ADAU1761Z
• Description: Eval Board For ADAU1761
• Manufacturer: Analog Devices Inc
• Series: SigmaDSP®r

Specifications of EVAL-ADAU1761Z

• Main Purpose: Audio, CODEC
• Embedded: Yes, DSP
• Utilized Ic / Part: ADAU1761
• Primary Attributes: Stereo, 24-Bit, 8 ~ 96 kHz Sampling Rate, GUI Tool
• Secondary Attributes: I²C and GPIO Interfaces, 2 Differential and 1 Stereo Single-Ended Analog Inputs and Outputs
• Silicon Manufacturer: Analog Devices
• Core Architecture: SigmaDSP
• Silicon Core Number: ADAU1761
• Silicon Family Name: SigmaDSP
• Application Sub Type: Audio
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ADAU1761
SPECIFICATIONS
Supply voltage (AVDD) = 3.3 V, T
bandwidth = 20 Hz to 20 kHz, word width = 24 bits, C
unless otherwise noted. Performance of all channels is identical, exclusive of the interchannel gain mismatch and interchannel phase
deviation specifications.
ANALOG PERFORMANCE SPECIFICATIONS
Specifications guaranteed at 25°C (ambient).
Table 1.
Parameter
ANALOG-TO-DIGITAL CONVERTERS
INPUT RESISTANCE
SINGLE-ENDED LINE INPUT
ADC Resolution
Digital Attenuation Step
Digital Attenuation Range
Single-Ended Line Input
PGA Inverting Inputs
PGA Noninverting Inputs
Full-Scale Input Voltage (0 dB)
Dynamic Range
Total Harmonic Distortion + Noise
Signal-to-Noise Ratio
Gain per Step
Total Gain Range
Mute Attenuation
Interchannel Gain Mismatch
Offset Error
Gain Error
Interchannel Isolation
Power Supply Rejection Ratio
With A-Weighted Filter (RMS)
No Filter (RMS)
With A-Weighted Filter (RMS)
No Filter (RMS)
A
= 25°C, master clock = 12.288 MHz (48 kHz f
Test Conditions/Comments
ADC performance excludes mixers
and PGA
All ADCs
−12 dB gain
0 dB gain
6 dB gain
−12 dB gain
0 dB gain
35.25 dB gain
All gains
Scales linearly with AVDD
AVDD = 1.8 V
AVDD = 3.3 V
20 Hz to 20 kHz, −60 dB input
AVDD = 1.8 V
AVDD = 3.3 V
AVDD = 1.8 V
AVDD = 3.3 V
−1 dBFS
AVDD = 1.8 V
AVDD = 3.3 V
AVDD = 1.8 V
AVDD = 3.3 V
AVDD = 1.8 V
AVDD = 3.3 V
CM capacitor = 20 μF
100 mV p-p @ 217 Hz
100 mV p-p @ 1 kHz
LOAD
(digital output) = 20 pF, I
Rev. C | Page 4 of 92
S
, 256 × f
Min
−12
LOAD
S
(digital output) = 2 mA, V
mode), input sample rate = 48 kHz, measurement
Typ
24
0.375
95
83
21
10.5
84.5
53
2
105
AVDD/3.3
0.55 (1.56)
1.0 (2.83)
94
99
91
96
−88
−90
94
99
91
96
3
−87
0.005
0
−12
68
65
67
Max
+6
IH
= 2 V, V
IL
Unit
Bits
dB
dB
kΩ
kΩ
kΩ
kΩ
kΩ
kΩ
kΩ
V rms
V rms (V p-p)
V rms (V p-p)
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
mV
%
dB
dB
dB
= 0.8 V,