ADE7758ARWZRL Analog Devices Inc, ADE7758ARWZRL Datasheet - Page 60
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ADE7758ARWZRL
Manufacturer Part Number
ADE7758ARWZRL
Description
IC,Power Metering,SOP,24PIN,PLASTIC
Manufacturer
Analog Devices Inc
Datasheet
1.ADE7758ARWZ.pdf
(72 pages)
Specifications of ADE7758ARWZRL
Input Impedance
380 KOhm
Measurement Error
0.1%
Voltage - I/o High
2.4V
Voltage - I/o Low
0.8V
Current - Supply
8mA
Voltage - Supply
4.75 V ~ 5.25 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
24-SOIC (0.300", 7.50mm Width)
Meter Type
3 Phase
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ADE7758ARWZRL
Manufacturer:
ADI/亚德诺
Quantity:
20 000
ADE7758
REGISTERS
COMMUNICATIONS REGISTER
The communications register is an 8-bit, write-only register that
controls the serial data transfer between the ADE7758 and the
host processor. All data transfer operations must begin with a
write to the communications register.
Table 16. Communications Register
Bit Location
0 to 6
7
DB7
W/R
Table 17. ADE7758 Register List
Address
[A6:A0]
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
0x08
0x09
0x0A
0x0B
0x0C
0x0D
Name
Reserved
AWATTHR
BWATTHR
CWATTHR
AVARHR
BVARHR
CVARHR
AVAHR
BVAHR
CVAHR
AIRMS
BIRMS
CIRMS
AVRMS
Bit Mnemonic
A0 to A6
W/R
DB6
A6
R/W
–
R
R
R
R
R
R
R
R
R
R
R
R
R
1
The seven LSBs of the communications register specify the register for the data transfer operation.
Table 17 lists the address of each ADE7758 on-chip register.
When this bit is a Logic 1, the data transfer operation immediately following the write to the
communications register is interpreted as a write to the ADE7758. When this bit is a Logic 0, the data
transfer operation immediately following the write to the communications register is interpreted as a
read operation.
Length
16
16
16
16
16
16
16
16
16
24
24
24
24
Description
DB5
A5
Type
S
S
S
S
S
S
S
S
S
S
S
S
S
2
DB4
A4
Default
Value
0
0
0
0
0
0
0
0
0
0
0
0
0
Rev. D | Page 60 of 72
Description
Reserved.
Watt-Hour Accumulation Register for Phase A. Active power is
accumulated over time in this read-only register. The AWATTHR register
can hold a maximum of 0.52 seconds of active energy information with
full-scale analog inputs before it overflows (see the Active Energy
Calculation section). Bit 0 and Bit 1 of the COMPMODE register determine
how the active energy is processed from the six analog inputs.
Watt-Hour Accumulation Register for Phase B.
Watt-Hour Accumulation Register for Phase C.
VAR-Hour Accumulation Register for Phase A. Reactive power is
accumulated over time in this read-only register. The AVARHR register
can hold a maximum of 0.52 seconds of reactive energy information
with full-scale analog inputs before it overflows (see the Reactive Energy
Calculation section). Bit 0 and Bit 1 of the COMPMODE register
determine how the reactive energy is processed from the six analog
inputs.
VAR-Hour Accumulation Register for Phase B.
VAR-Hour Accumulation Register for Phase C.
VA-Hour Accumulation Register for Phase A. Apparent power is
accumulated over time in this read-only register. The AVAHR register can
hold a maximum of 1.15 seconds of apparent energy information with
full-scale analog inputs before it overflows (see the Apparent Energy
Calculation section). Bit 0 and Bit 1 of the COMPMODE register determine
how the apparent energy is processed from the six analog inputs.
VA-Hour Accumulation Register for Phase B.
VA-Hour Accumulation Register for Phase C.
Phase A Current Channel RMS Register. The register contains the rms
component of the Phase A input of the current channel. The source is
selected by data bits in the mode register.
Phase B Current Channel RMS Register.
Phase C Current Channel RMS Register.
Phase A Voltage Channel RMS Register.
DB3
A3
The data written to the communications register determines
whether the next operation is a read or a write and which
register is being accessed.
Table 16 outlines the bit designations for the communications
register.
DB2
A2
DB1
A1
DB0
A0