ADUC7034BCPZ-RL Analog Devices Inc, ADUC7034BCPZ-RL Datasheet - Page 26

IC,Battery Management,LLCC,48PIN,PLASTIC

ADUC7034BCPZ-RL

Manufacturer Part Number
ADUC7034BCPZ-RL
Description
IC,Battery Management,LLCC,48PIN,PLASTIC
Manufacturer
Analog Devices Inc
Series
MicroConverter® ADuC7xxxr
Datasheet

Specifications of ADUC7034BCPZ-RL

Core Processor
ARM7
Core Size
16/32-Bit
Speed
20.48MHz
Connectivity
LIN, SPI, UART/USART
Peripherals
POR, PSM, Temp Sensor, WDT
Number Of I /o
9
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3.5 V ~ 18 V
Data Converters
A/D 2x16b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 115°C
Package / Case
48-LFCSP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
ADuC7034
FEE0CON Register
Name:
Address:
Default Value:
Access:
Function:
Table 13. Command Codes in FEE0CON
Code
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
0x08
0x09
0x0A
0x0B
0x0C
0x0D
0x0E
0x0F
1
The FEE0CON register reads 0x07 immediately after the execution of this command.
1
1
1
1
1
1
1
FEE0CON
0xFFFF0E08
0x07
Read/write access
This 8-bit register is written by user code to control the operating modes of the Flash/EE memory controller.
Command
Reserved
Single read
Single write
Erase write
Single verify
Single erase
Mass erase
Idle
Reserved
Reserved
Reserved
Signature
Protect
Reserved
Reserved
Ping
Description
Reserved. This command should not be written by user code.
Load FEE0DAT with the 16-bit data indexed by FEE0ADR.
Write FEE0DAT at the address pointed by FEE0ADR. This operation takes 50 μs.
Erase the page indexed by FEE0ADR and write FEE0DAT at the location pointed by FEE0ADR. This
operation takes 20 ms.
Compare the contents of the location pointed by FEE0ADR to the data in FEE0DAT. The result of
the comparison is returned in FEE0STA Bit 1.
Erase the page indexed by FEE0ADR.
Erase 30 kB of user space. The 2 kB kernel is protected. This operation takes 1.2 sec. To prevent
accidental execution, a command sequence is required to execute this instruction; this is described
in the Command Sequence for Executing a Mass Erase section.
Default command.
Reserved. This command should not be written by user code.
Reserved. This command should not be written by user code.
Reserved. This command should not be written by user code.
This command results in a 24-bit, LFSR-based signature being generated and loaded into FEE0SIG.
If FEE0ADR is less than 0x87800, this command results in a 24-bit, LFSR-based signature of the
user code space from the page specified in FEE0ADR upwards, including the kernel, security bits,
and Flash/EE key.
If FEE0ADR is greater than 0x87800, the kernel and manufacturing data is signed. This operation
takes 120 μs.
This command can be run one time only. The value of FEE0PRO is saved and can be removed only
with a mass erase (0x06) or with the software protection key.
Reserved. This command should not be written by user code.
Reserved. This command should not be written by user code.
No operation, interrupt generated.
Rev. B | Page 26 of 136

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