ADUC7039BCP6Z-RL Analog Devices Inc, ADUC7039BCP6Z-RL Datasheet - Page 35

• Manufacturer Part Number: ADUC7039BCP6Z-RL
• Description: Flash 64k ARM7 Dual 16-Bit ADC LIN I.C.
• Manufacturer: Analog Devices Inc
• Series: MicroConverter® ADuC7xxxr

Specifications of ADUC7039BCP6Z-RL

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 20.48MHz
• Connectivity: LIN, SPI
• Peripherals: POR, Temp Sensor, WDT
• Number Of I /o: 6
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 18 V
• Data Converters: A/D 2x16b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 115°C
• Package / Case: 32-LFCSP
• Lead Free Status / RoHS Status: Lead free by exemption / RoHS compliant by exemption
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free by exemption / RoHS compliant by exemption

Current Channel ADC Control Register
Name:
Address:
Default Value:
Access:
Function:
Note:
Table 29. ADC0CON MMR Bit Designations
Bit
15
14 to 13
12 to 10
9
8
7 to 6
5
4
3 to 0
Description
Current channel ADC enable.
This bit is set by user code to enable the I-ADC.
This bit is cleared by user code power-down the I-ADC and resets the respective ADC ready bit in the ADCSTA MMR to 0.
IIN current source enable.
00 = current sources off.
01 = enables 50 μA current source on IIN+.
10 = enables 50 μA current source on IIN−.
11 = enables 50 μA current source on both IIN− and IIN+.
Not used. These bits are reserved for future functionality and should be written as zero.
Current channel ADC output coding.
This bit is set by user code to configure I-ADC output coding as unipolar.
This bit is cleared by user code to configure I-ADC output coding as twos complement.
Not used. This bit is reserved for future functionality and should be written as zero.
Current channel ADC input select.
00 = IIN+, IIN−.
01 = IIN−, IIN− = diagnostic, internal short configuration.
10 = VREF/136, 0 V, diagnostic, test voltage for gain settings <512. If the (REG_AVDD, AGND) divided-by-two reference is selected,
REG_AVDD is used instead of VREF with this I-ADC input selection. This leads to ADC0DAT scaled by two.
11 = not defined.
Reserved.
Current channel ADC reference select.
0 = internal, 1.2 V precision reference selected.
1 = (REG_AVDD, AGND) divided-by-two selected.
Current channel ADC gain select. Note: nominal I-ADC full-scale input voltage = (VREF/gain).
0001 = I-ADC gain of 2. This setting is tested for functionality only; therefore, it does not appear in the electrical specifications.
0010 = I-ADC gain of 4.
0011 = I-ADC gain of 8.
0100 = I-ADC gain of 16.
0101 = I-ADC gain of 32.
0110 = I-ADC gain of 64.
0111 = I-ADC gain of 128.
1000 = I-ADC gain of 256.
1001 = I-ADC gain of 512.
Other = I-ADC gain is undefined.
ADC0CON
0xFFFF050C
0x0002
Read/write
The current channel ADC control MMR is a 16-bit register that is used to configure the I-ADC.
If the current ADC is reconfigured via ADC0CON, the voltage/temperature ADC is also reset.
Rev. B | Page 35 of 92
ADuC7039