DSPIC33FJ128MC706A-E/MR Microchip Technology, DSPIC33FJ128MC706A-E/MR Datasheet - Page 246

• Manufacturer Part Number: DSPIC33FJ128MC706A-E/MR
• Description: 16 Bit MCU/DSP 40MIPS 128KB FLASH 64 QFN 9x9x0.9mm TUBE
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ128MC706A-E/MR

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: CAN, I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 64-VFQFN, Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

dsPIC33FJXXXMCX06A/X08A/X10A
REGISTER 22-1:
DS70594B-page 246
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14
bit 13
bit 12
bit 11
bit 10
bit 9-8
bit 7-5
bit 4
R/W-0
ADON
R/W-0
ADON: ADC Operating Mode bit
1 = ADC module is operating
0 = ADC is off
Unimplemented: Read as ‘0’
ADSIDL: Stop in Idle Mode bit
1 = Discontinue module operation when device enters Idle mode
0 = Continue module operation in Idle mode
ADDMABM: DMA Buffer Build Mode bit
1 = DMA buffers are written in the order of conversion. The module will provide an address to the DMA
0 = DMA buffers are written in Scatter/Gather mode. The module will provide a scatter/gather address
Unimplemented: Read as ‘0’
AD12B: 10-Bit or 12-Bit Operation Mode bit
1 = 12-bit, 1-channel ADC operation
0 = 10-bit, 4-channel ADC operation
FORM<1:0>: Data Output Format bits
For 10-Bit Operation:
11 = Signed fractional (D
10 = Fractional (D
01 = Signed integer (D
00 = Integer (D
For 12-Bit Operation:
11 = Signed fractional (D
10 = Fractional (D
01 = Signed Integer (D
00 = Integer (D
SSRC<2:0>: Sample Clock Source Select bits
111 = Internal counter ends sampling and starts conversion (auto-convert)
110 = Reserved
101 = Reserved
100 = GP timer (Timer5 for ADC1, Timer3 for ADC2) compare ends sampling and starts conversion
011 = MPWM interval ends sampling and starts conversion
010 = GP timer (Timer3 for ADC1, Timer5 for ADC2) compare ends sampling and starts conversion
001 = Active transition on INT0 pin ends sampling and starts conversion
000 = Clearing sample bit ends sampling and starts conversion
Unimplemented: Read as ‘0’
SSRC<2:0>
R/W-0
channel that is the same as the address used for the non-DMA stand-alone buffer.
to the DMA channel, based on the index of the analog input and the size of the DMA buffer.
U-0
—
ADxCON1: ADCx CONTROL REGISTER 1 (where x = 1 or 2)
HC = Hardware Clearable bit
W = Writable bit
‘1’ = Bit is set
OUT
OUT
ADSIDL
OUT
OUT
R/W-0
R/W-0
= 0000 00dd dddd dddd)
= 0000 dddd dddd dddd)
= dddd dddd dd00 0000)
= dddd dddd dddd 0000)
OUT
OUT
OUT
OUT
= ssss sssd dddd dddd, where s = .NOT.d<9>)
= ssss sddd dddd dddd, where s = .NOT.d<11>)
= sddd dddd dd00 0000, where s = .NOT.d<9>)
= sddd dddd dddd 0000, where s = .NOT.d<11>)
ADDMABM
Preliminary
R/W-0
U-0
—
HS = Hardware Settable bit
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
SIMSAM
R/W-0
U-0
—
AD12B
R/W-0
R/W-0
ASAM
 2009 Microchip Technology Inc.
x = Bit is unknown
R/W-0,
HC,HS
R/W-0
SAMP
FORM<1:0>
HC, HS
R/C-0,
DONE
R/W-0
bit 8
bit 0