DSPIC33FJ32MC202-E/MM Microchip Technology, DSPIC33FJ32MC202-E/MM Datasheet - Page 20

16-bit DSC, 32KB Flash,Motor,40 MIPS,nanoWatt 28 QFN-S 6x6mm TUBE

DSPIC33FJ32MC202-E/MM

Manufacturer Part Number
DSPIC33FJ32MC202-E/MM
Description
16-bit DSC, 32KB Flash,Motor,40 MIPS,nanoWatt 28 QFN-S 6x6mm TUBE
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr

Specifications of DSPIC33FJ32MC202-E/MM

Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 6x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-QFN
Package
28QFN-S EP
Device Core
dsPIC
Family Name
dSPIC33
Maximum Speed
40 MHz
Operating Supply Voltage
3.3 V
Data Bus Width
16 Bit
Number Of Programmable I/os
21
Interface Type
I2C/SPI/UART
On-chip Adc
6-chx10-bit|6-chx12-bit
Number Of Timers
5
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164336 - MODULE SOCKET FOR PM3 28/44QFNDV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DSPIC33FJ32MC202-E/MM
Quantity:
600
dsPIC33FJ32MC202/204 and dsPIC33FJ16MC304
3.3
The dsPIC33FJ32MC202/204 and dsPIC33FJ16MC304
features a 17-bit by 17-bit single-cycle multiplier that is
shared by both the MCU ALU and DSP engine. The
multiplier can perform signed, unsigned and mixed-sign
multiplication. Using a 17-bit by 17-bit multiplier for 16-bit
by 16-bit multiplication not only allows you to perform
mixed-sign multiplication, it also achieves accurate results
for special operations, such as (-1.0) x (-1.0).
FIGURE 3-1:
DS70283H-page 20
Control Block
PSV and Table
Data Access
Program Memory
Address Latch
Data Latch
Special MCU Features
23
23
Controller
Interrupt
23
dsPIC33FJ32MC202/204 and dsPIC33FJ16MC304 CPU CORE BLOCK DIAGRAM
to Various Blocks
Control Signals
Decode and
Control
Stack
Instruction
Logic
PCU
Program Counter
Control
24
8
PCH
Control
Logic
Loop
16
PCL
16
Y Data Bus
X Data Bus
Divide Support
DSP Engine
Instruction Reg
Data Latch
ROM Latch
Address Generator Units
Address
X RAM
Latch
16
24
16
The dsPIC33FJ32MC202/204 and dsPIC33FJ16MC304
supports 16/16 and 32/16 divide operations, both
fractional and integer. All divide instructions are iterative
operations. They must be executed within a REPEAT loop,
resulting in a total execution time of 19 instruction cycles.
The divide operation can be interrupted during any of
those 19 cycles without loss of data.
A 40-bit barrel shifter is used to perform up to a 16-bit
left or right shift in a single cycle. The barrel shifter can
be used by both MCU and DSP instructions.
16
Data Latch
Address
Y RAM
Latch
EA MUX
W Register Array
16
16
16
16 x 16
16
16
16-bit ALU
16
© 2011 Microchip Technology Inc.
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16
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To Peripheral Modules
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16
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16

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