EVAL-AD5270SDZ Analog Devices Inc, EVAL-AD5270SDZ Datasheet - Page 20

• Manufacturer Part Number: EVAL-AD5270SDZ
• Description: EVALUATION BOARD
• Manufacturer: Analog Devices Inc

Specifications of EVAL-AD5270SDZ

• Main Purpose: Digital Potentiometer
• Embedded: No
• Utilized Ic / Part: AD5270
• Primary Attributes: 1 Channel, 1024 Position
• Secondary Attributes: 2.7 ~ 5.5 V, 5 ppm/°C, SPI Interfaces
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AD5270/AD5271
SHUT-DOWN MODE
The AD5270/AD5271 can be shut down by executing the
software shutdown command, Command 9 (see Table 11), and
setting the LSB to 1. This feature places the RDAC in a zero-
power-consumption state where Terminal Ax is open circuited
and the Wiper Terminal Wx remains connected. It is possible to
execute any command from Table 11 while the AD5270/AD5271
are in shutdown mode. The parts can be taken out of shutdown
mode by executing Command 9 and setting the LSB to 0 or by a
software reset, Command 4 (see Table 11).
Table 12. Write and Read to RDAC and 50-TP Memory
DIN
0x1C03
0x0500
0x0800
0x0C00
0x1800
0x0000
0x1419
0x2000
0x0000
1
Table 13. Control Register Bit Map
DB9
0
Table 14. Control Register Bit Description
Bit Name
C0
C1
C2
C3
1
X is don’t care.
Wiper position frozen to the last value programmed in the 50-TP memory. The wiper is frozen to midscale if the 50-TP memory has not been previously programmed.
0x1C03
0xXXXX
SDO
0xXXXX
0x0500
0x100
0x0C00
0xXX19
0x0000
0x0100
DB8
0
1
Action
Enable update of the wiper position and the 50-TP memory contents through the digital interface.
Write 0x100 to the RDAC register; wiper moves to ¼ full-scale position.
Prepares data read from RDAC register.
Stores RDAC register content into the 50-TP memory. A 16-bit word appears out of SDO, where the last 10-bits contain
the contents of the RDAC register (0x100).
Prepares data read of last programmed 50-TP memory monitor location.
NOP Instruction 0 sends a 16-bit word out of SDO, where the six LSBs last six bits contain the binary address of the last
programmed 50-TP memory location, for example, 0x19 (see Table 13).
Prepares data read from Memory Location 0x19.
Prepares data read from the control register. Sends a 16-bit word out of SDO, where the last 10-bits contain the
contents of Memory Location 0x19.
NOP Instruction 0 sends a 16-bit word out of SDO, where the last four bits contain the contents of the control register.
If Bit C3 = 1, the fuse program command successful.
Description
50-TP program enable
0 = 50-TP program disabled (default)
1 = enable device for 50-TP program
RDAC register write protect
0 = wiper position frozen to value in 50-TP memory (default)
1 = allow update of wiper position through digital interface
R-performance enable
0 = RDAC resistor tolerance calibration enabled (default)
1 = RDAC resistor tolerance calibration disabled
50-TP memory program success bit
0 = fuse program command unsuccessful (default)
1 = fuse program command successful
DB7
0
DB6
0
DB5
0
Rev. E | Page 20 of 24
DB4
0
RESISTOR PERFORMANCE MODE
This mode activates a new, patented 1% end-to-end resistor
tolerance that ensures a ±1% resistor tolerance error on each
code, that is, code = half scale, R
Table 3, Table 5, and Table 6 to verify which codes achieve ±1%
resistor tolerance. The resistor performance mode is activated by
programming Bit C2 of the control register.
RESET
The AD5270/AD5271 can be reset through software by executing
Command 4 (see Table 11). The reset command loads the
RDAC register with the contents of the most recently programmed
50-TP memory location. The RDAC register loads with
midscale if no 50-TP memory location has been previously
programmed.
1
DB3
C3
DB2
C2
WA
= 10 kΩ ± 100 Ω. See Table 2,
DB1
C1
DB0
C0