EVAL-AD5292EBZ Analog Devices Inc, EVAL-AD5292EBZ Datasheet - Page 26

• Manufacturer Part Number: EVAL-AD5292EBZ
• Description: EVALUATION BOARD
• Manufacturer: Analog Devices Inc

Specifications of EVAL-AD5292EBZ

• Main Purpose: Digital Potentiometer
• Embedded: Yes
• Utilized Ic / Part: AD5292
• Primary Attributes: 1 Channel, 256 Position
• Secondary Attributes: SPI Interface
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AD5291/AD5292
PROGRAMMING THE VARIABLE RESISTOR
Rheostat Operation—1% Resistor Tolerance
The AD5291 and AD5292 operate in rheostat mode when only
two terminals are used as a variable resistor. The unused
terminal can be left floating or tied to the W terminal, as shown in
Figure 66.
The nominal resistance between Terminal A and Terminal B,
R
tap points accessed by the wiper terminal. The 8-/10-bit data in
the RDAC latch is decoded to select one of the 256/1024
possible wiper settings. The AD5291 and AD5292 contain an
internal ±1% resistor performance mode that can be disabled or
enabled (this is enabled by default), by programming Bit C2 of
the control register (see Table 13 and Table 14). The digitally
programmed output resistance between the W terminal and the
A terminal, R
R
resistance error across a wide code range. As a result, the
general equations for determining the digitally programmed
output resistance between the W terminal and B terminal are
AD5291:
AD5292:
where:
D is the decimal equivalent of the binary code loaded in the
8-/10-bit RDAC register.
R
Similar to the mechanical potentiometer, the resistance of the
RDAC between the W terminal and the A terminal also produces a
digitally controlled complementary resistance, R
calibrated to give a maximum of 1% absolute resistance error.
R
data loaded into the latch increases. The general equations for
this operation are
AD5291:
AD5292:
AB
WB
AB
WA
, is available in 20 kΩ, 50 kΩ, and 100 kΩ, and 256 or 1024
, is internally calibrated to give a maximum of ±1% absolute
is the end-to-end resistance.
starts at the maximum resistance value and decreases as the
R
R
R
R
WB
WB
WA
WA
(
(
(
(
D
D
D
D
)
)
)
)
A
B
WA
=
=
=
=
Figure 66. Rheostat Mode Configuration
1024
256
256
, and between the W terminal and B terminal,
1024
D
D
1024
256
W
−
×
×
−
R
D
R
D
AB
×
AB
×
R
R
A
B
AB
AB
W
A
B
WA
W
. R
WA
is also
Rev. D | Page 26 of 32
(1)
(2)
(3)
(4)
where:
D is the decimal equivalent of the binary code loaded in the
8-/10-bit RDAC register.
R
In the zero-scale condition, a finite total wiper resistance of 120 Ω
is present. Regardless of which setting the part is operating in,
take care to limit the current between Terminal A and Terminal B,
between Terminal W and Terminal A, and between Terminal W
and Terminal B, to the maximum continuous current of ±3 mA or
to the pulse current specified in Table 8. Otherwise, degradation
or possible destruction of the internal resistors may occur.
PROGRAMMING THE POTENTIOMETER DIVIDER
Voltage Output Operation
The digital potentiometer easily generates a voltage divider at
the wiper to B and at the wiper to A that is proportional to the
input voltage at A to B, as shown in Figure 67. Unlike the polarity
of V
W to A, and W to B can be at either polarity.
If ignoring the effect of the wiper resistance for simplicity, con-
necting the A terminal to 30 V and the B terminal to ground
produces an output voltage at the Wiper W to Terminal B
ranging from 0 V to 1 LSB less than 30 V. Each LSB of voltage is
equal to the voltage applied across Terminal A and Terminal B,
divided by the 256/1024 positions of the potentiometer divider.
The general equations defining the output voltage at V
respect to ground for any valid input voltage applied to Terminal A
and Terminal B are
AD5291:
AD5292:
If using the AD5291 and AD5292 in voltage divider mode as
shown in Figure 67, then the ±1% resistor tolerance calibration
feature reduces the error when matching with discrete resistors.
However, it is recommended to disable the internal ±1% resistor
tolerance calibration feature by programming Bit C2 of the
control register (see Table 13 and Table 14) to optimize wiper
position update rate. In this configuration, the RDAC is ratiome-
tric and resistor tolerance error does not affect performance.
AB
is the end-to-end resistance.
DD
V
V
W
W
to GND, which must be positive, voltage across A to B,
(
(
D
D
)
)
=
=
Figure 67. Potentiometer Mode Configuration
256
1024
D
D
×
×
V
V
A
V
A
IN
+
+
256
1024
256
1024
A
B
−
−
D
W
D
×
×
V
V
V
B
OUT
B
W
with
(5)
(6)