CP1E-N20DT-A Omron, CP1E-N20DT-A Datasheet - Page 13

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CP1E-N20DT-A

Manufacturer Part Number
CP1E-N20DT-A
Description
12In 8NPN RS232,AC PS,Non UL
Manufacturer
Omron
Datasheet

Specifications of CP1E-N20DT-A

Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Internal Memory in the CPU Units
CPU Unit Memory Backup Structure
The internal memory in the CPU Unit consists of built-in RAM and built-in EEPROM. The built-in RAM is used as execution memory and the built-
in EEPROM is used as backup memory.
●Precautions for Correct Use
Create a system and write the ladder programs so that problems will not occur in the system if the data in these area may be unstable.
The built-in capacitor’s backup time varies with the ambient temperature as shown in the following graph.
• Data in areas such as the DM area (D), Holding Area (H), the Counter Present Values (C) and the status of Counter Completion Flags (C), which
• The error log, and clock data (N/NA-type CPU Unit only) in the Auxiliary Area will become unstable. Other words and bits in the Auxiliary Area
is retained by the battery, may be unstable when the power supply is turned off (Except for the DM area that are retained by the built-in EEP-
ROM using the Auxilliary Area bit.)
will be cleared to their default values.
Data is retained even if the power
supply is interrupted for longer
than the backup time of the built-in
capacitor.
Backup memory
User Program Area
(Backup)
Built-in EEPROM
PLC Setup
DM Area
Backup using bit in Auxiliary Area
DM Area data read at startup
50 hours
40 hours
25 hours
20 hours
9 hours
7 hours
Automatic backup
Automatic backup
Read at startup
Read at startup
CPU Unit
25
If a CP1W-BAT01 Battery (sold
separately) is mounted to an N/NA-type
CPU Unit, which is normally backed up
by a built-in capacitor, data will be
backed up by the battery.
Execution Memory
CP1E-E@@D@-@ CP1E-N@@D@-@/NA20D@-@
User Program Area
I/O Memory Areas
Built-in RAM
PLC Setup
DM Area
40
Ambient temperature
CP1E E-type CPU Unit
CP1E N/NA-type CPU Unit
60
Area where data is backed up
even if the power supply is
interrupted for longer than the
back-up time of the built-in
capacitor.
Area where data is cleared if
the power supply is
interrupted for longer than the
back-up time of the built-in
capacitor.
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