MMBF4391LT1G ON Semiconductor, MMBF4391LT1G Datasheet - Page 4

TRANS JFET SW N-CH 30V SOT23

MMBF4391LT1G

Manufacturer Part Number
MMBF4391LT1G
Description
TRANS JFET SW N-CH 30V SOT23
Manufacturer
ON Semiconductor
Datasheet

Specifications of MMBF4391LT1G

Current - Drain (idss) @ Vds (vgs=0)
50mA @ 15V
Drain To Source Voltage (vdss)
30V
Fet Type
N-Channel
Voltage - Breakdown (v(br)gss)
30V
Voltage - Cutoff (vgs Off) @ Id
4V @ 10nA
Input Capacitance (ciss) @ Vds
14pF @ 15V
Resistance - Rds(on)
30 Ohm
Mounting Type
Surface Mount
Package / Case
TO-236-3, SC-59, SOT-23-3
Power - Max
225mW
Configuration
Single
Transistor Polarity
N-Channel
Drain Source Voltage Vds
30 V
Gate-source Breakdown Voltage
30 V
Drain Current (idss At Vgs=0)
50 mA to 150 mA
Maximum Operating Temperature
+ 150 C
Maximum Drain Gate Voltage
30 V
Minimum Operating Temperature
- 55 C
Mounting Style
SMD/SMT
Breakdown Voltage Vbr
-30V
Gate-source Cutoff Voltage Vgs(off) Max
-10V
Power Dissipation Pd
225mW
Operating Temperature Range
-55°C To +150°C
No. Of Pins
3
Leaded Process Compatible
Yes
Rohs Compliant
Yes
Transistor Type
JFET
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
MMBF4391LT1GOS
MMBF4391LT1GOS
MMBF4391LT1GOSTR

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
MMBF4391LT1G
Manufacturer:
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Quantity:
409 868
Part Number:
MMBF4391LT1G
Manufacturer:
ON
Quantity:
30 000
Part Number:
MMBF4391LT1G
Manufacturer:
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Quantity:
20 000
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Part Number:
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Quantity:
4 500
PULSE WIDTH = 2.0 ms
Figure 6. Typical Forward Transfer Admittance
DUTY CYCLE ≤ 2.0%
7.0
5.0
3.0
2.0
200
160
120
20
10
R
50 W
80
40
0.5
Figure 5. Switching Time Test Circuit
0
V
GEN
Figure 8. Effect of Gate−Source Voltage
0
GEN
I
= 10
mA
INPUT PULSE
DSS
0.7
MMBF4393
t
r
t
≤ 0.25 ns
f
25 mA
on Drain−Source Resistance
1.0
≤ 0.5 ns
1.0
INPUT
V
GS
50 mA
2.0
50
W
, GATE-SOURCE VOLTAGE (VOLTS)
SET V
2.0
I
D
R
, DRAIN CURRENT (mA)
K
T
channel
R
3.0
DS(off)
3.0
75 mA
GG
V
DS
R
> R
D'
R
= 15 V
= 25°C
= 10 V
= R
GG
V
K
R
5.0
4.0
MMBF4392
GG
100 mA
D
D
+ R
(R
7.0
T
T
+ 50)
+ 50
5.0
V
R
10
DD
D
125 mA
T
6.0
50
W
channel
R
T
20
MMBF4391
= 25°C
7.0
30
OUTPUT
50
8.0
http://onsemi.com
a test circuit similar to Figure 5. At the beginning of the switching
interval, the gate voltage is at Gate Supply Voltage (−V
Drain−Source Voltage (V
Voltage (V
Capacitance (C
V
discharges through the series combination of R
discharge to V
combination of effective load impedance (R’
Resistance (r
resistance r
discharges, V
discharges through r
the situation is reversed with r
R
cascaded stages where the driving source impedance is normally the
load impedance of the previous stage, and 2) R
impedance) the driving source impedance is that of the generator.
K
GG
The switching characteristics shown above were measured using
During the turn−on interval, Gate−Source Capacitance (C
Predicting turn−on time is somewhat difficult as the channel
The above switching curves show two impedance conditions; 1)
is equal to R
4
+ V
Figure 9. Effect of Temperature on Drain−Source
DS
7.0
5.0
3.0
2.0
1.5
1.0
DD
DS
15
10
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
.
0.03
-70
DS
) due to the voltage divider. Thus Reverse Transfer
GS
DS(on)
is a function of the gate−source voltage. While C
rss
). During the turn−off, this charge flow is reversed.
0.05
) of Gate−Drain Capacitance (C
approaches zero and r
D’
-40
I
V
DS
D
Figure 7. Typical Capacitance
GS
0.1
through R
which simulates the switching behavior of
= 1.0 mA
T
, turn−on time is non−linear. During turn−off,
channel
= 0
On−State Resistance
V
-10
R
DS
, REVERSE VOLTAGE (VOLTS)
(C
, CHANNEL TEMPERATURE (°C)
T
NOTE 1
) is slightly lower than Drain Supply
0.3
channel
ds
DS
is negligible
20
G
0.5
= 25°C
and R
increasing as C
1.0
50
C
gd
C
K
gs
DS
in series with the parallel
80
3.0
decreases. Since C
D
Gen
) and Drain−Source
5.0
110
gd
and R
gd
charges.
) is charged to
10
K
140
K
= 0 (low
. C
GG
gd
170
30
). The
must
gs
gd
gs
)

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