FDMB3800N Fairchild Semiconductor, FDMB3800N Datasheet
FDMB3800N
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FDMB3800N Summary of contents
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... Thermal Resistance, Junction to Ambient θJA Package Marking and Ordering Information Device Marking Device 3800 FDMB3800N ©2006 Fairchild Semiconductor Corporation FDMB3800N Rev. C1 ® MOSFET General Description = 4.8A These N-Channel Logic Level MOSFETs are produced using D Fairchild Semiconductor's advanced PowerTrench process that = 4.3A ...
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... Reverse Recovery Time rr Q Reverse Recovery Charge rr Notes determined with the device mounted on a 1in θJA the user's board design. 2: Pulse Test: Pulse Width < 300µs, Duty cycle < 2.0%. FDMB3800N Rev. 25°C unless otherwise noted J Test Conditions I = 250µ 250µA, referenced to 25°C ...
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... T , JUNCTION TEMPERATURE ( J Figure 3. Normalized On - Resistance vs Junction Temperature 1 GATE TO SOURCE VOLTAGE (V) GS Figure 5. Transfer Characteristics FDMB3800N Rev. 25°C unless otherwise noted J 2.8 2.6 2.4 2.2 2 1.8 3.0V 1.6 1.4 1.2 2.5V 1 0.8 0.75 1 1.25 0.102 0.092 0.082 0.072 0.062 0.052 ...
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... C/W θ 0.01 0 DRAIN-SOURCE VOLTAGE (V) DS Figure 9. Forward Bias Safe Operating Area 180 150 120 0.0001 0.001 Figure 11. Single Pulse Maximum Power Dissipation FDMB3800N Rev. 25°C unless otherwise noted J 600 V = 10V 15V DS 500 20V 400 300 200 100 100us 4 1ms 3 ...
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... Typical Characteristics 0.5 0.2 0.1 0.05 0.1 0.02 0.01 0.01 SINGLE PULSE 0.001 0.0001 0.001 FDMB3800N Rev. 25°C unless otherwise noted J 0.01 0 RECTANGULAR PULSE DURATION (s) Figure 12. Transient Thermal Response Curve 5 P(pk Peak θJA θJA Duty Cycle 100 1000 www.fairchildsemi.com ...
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... Dimensional Outline and Pad Layout FDMB3800N Rev.C1 6 www.fairchildsemi.com ...
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... PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Preliminary No Identification Needed Obsolete FDMB3800N Rev. C1 OCX™ SILENT SWITCHER OCXPro™ SMART START™ ® OPTOLOGIC SPM™ OPTOPLANAR™ Stealth™ ...