FDS8858CZ Fairchild Semiconductor, FDS8858CZ Datasheet - Page 5

• Manufacturer Part Number: FDS8858CZ
• Description: MOSFET DUAL N/P-CHAN 30V SO-8
• Manufacturer: Fairchild Semiconductor
• Series: PowerTrench®r

Specifications of FDS8858CZ

• Fet Type: N and P-Channel
• Fet Feature: Logic Level Gate
• Rds On (max) @ Id, Vgs: 17 mOhm @ 8.6A, 10V
• Drain To Source Voltage (vdss): 30V
• Current - Continuous Drain (id) @ 25° C: 8.6A, 7.3A
• Vgs(th) (max) @ Id: 3V @ 250µA
• Gate Charge (qg) @ Vgs: 24nC @ 10V
• Input Capacitance (ciss) @ Vds: 1205pF @ 15V
• Power - Max: 900mW
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width)
• Configuration: Dual Dual Drain
• Transistor Polarity: N and P-Channel
• Resistance Drain-source Rds (on): 0.017 Ohm @ 10 V @ N Channel
• Forward Transconductance Gfs (max / Min): 27 S / 21 S
• Drain-source Breakdown Voltage: 30 V
• Gate-source Breakdown Voltage: +/- 20 V @ N Channel or +/- 25 V @ P Channel
• Continuous Drain Current: 8.6 A @ N Channel or 7.3 A @ P Channel
• Power Dissipation: 1600 mW
• Maximum Operating Temperature: + 150 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 55 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: FDS8858CZTR

©2009 Fairchild Semiconductor Corporation
FDS8858CZ Rev.B1
Typical Characteristics (Q1 N-Channel)
Figure 11. Maximum Continuous Drain
Figure 7.
10
10
20
25
8
6
4
2
0
8
6
4
2
0
1
0.01
Current vs Ambient Temperature
0
Figure 9.
I
R
D
θ
= 8.6A
JA
= 78
Switching Capability
50
Gate Charge Characteristics
4
T
o
A
0.1
t
Unclamped Inductive
C/W
AV
,
AMBIENT TEMPERATURE (
T
, TIME IN AVALANCHE(ms)
Q
J
g
= 125
V
,
DD
75
GATE CHARGE(nC)
8
= 10V
o
C
1
V
100
DD
T
12
V
= 20V
V
J
GS
GS
= 25
= 10V
= 4.5V
o
V
C
DD
10
125
o
C )
= 15V
16
150
100
20
T
J
= 25°C unless otherwise noted
5
Figure 10. Gate Leakage Current vs Gate to
3000
1000
0.01
10
10
10
10
10
100
0.1
50
10
50
1
-3
-4
-5
-6
-7
0.1
0.1
0
Figure 8.
V
THIS AREA IS
LIMITED BY r
Figure 12.
f = 1MHz
V
DS
GS
= 0V
V
= 0V
DS
5
V
V
GS
, DRAIN TO SOURCE VOLTAGE (V)
DS
to Source Voltage
,
, DRAIN to SOURCE VOLTAGE (V)
Source Voltage
Operating Area
Capacitance vs Drain
GATE TO SOURCE VOLTAGE(V)
DS(on)
Forward Bias Safe
10
1
1
T
SINGLE PULSE
T
R
T
T
J
J
A
J
θ
= 125
JA
= MAX RATED
= 25
= 25
15
= 135
o
o
o
C
C
C
C
C
C
rss
oss
iss
o
C/W
20
10
10
www.fairchildsemi.com
25
100ms
10ms
10s
DC
1ms
1s
30
80
30