TDA7493 STMicroelectronics, TDA7493 Datasheet

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TDA7493

Manufacturer Part Number
TDA7493
Description
Audio Amplifiers 3W + 3W Dual BTL Class-D 4-Select dB
Manufacturer
STMicroelectronics
Datasheet

Specifications of TDA7493

Amplifier Class
D
No. Of Channels
2
Output Power
3W
Supply Voltage Range
3V To 5.5V
Thd + N
0.05% @ 0.5W, 4ohm, VCC=5V
Load Impedance
4ohm
Operating Temperature Range
0°C To +70°C
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Features
Table 1.
October 2009
TDA7493
TDA749313TR
3.0 W + 3.0 W continuous output power
R
2.8 W + 2.8 W continuous output power
R
Single supply voltage range 3.0 V to 5.5 V
High efficiency (η = 83%)
Four selectable, fixed gain settings of
6 dB, 12 dB, 15.6 dB and 18 dB
Differential inputs minimize common-mode
noise
Filterless operation
Standby feature
Short-circuit protection
Thermal-overload protection
Externally synchronizable
L
L
= 4 Ω, THD = 10%, V
= 4 Ω, THD = 10%, V
Order codes
Device summary
0 to 70 °C
0 to 70 °C
CC
CC
Operating temperature
= 5 V (filterless)
= 5 V (with filter)
range
3 W + 3 W dual BTL class-D audio amplifier
Doc ID 14570 Rev 5
HTSSOP24 (EPD)
HTSSOP24 (EPD)
Description
The TDA7493 is a dual BTL class-D audio
amplifier, specially designed for LCD TV, LCD
monitors or small speakers on cradles with
single-supply operation.
The filterless operation allows the external
component count to be reduced.
The TDA7493 is assembled in the HTSSOP24
package. Thanks to the high-efficiency and to the
exposed-pad-down (EPD) package no separate
heatsink is required.
HTSSOP24 package with exposed pad down
Package
Tube
Tape and reel
TDA7493
Packaging
www.st.com
1/30
30

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TDA7493 Summary of contents

Page 1

... dual BTL class-D audio amplifier = 5 V (filterless (with filter) HTSSOP24 package with exposed pad down Description The TDA7493 is a dual BTL class-D audio amplifier, specially designed for LCD TV, LCD monitors or small speakers on cradles with single-supply operation. The filterless operation allows the external component count to be reduced ...

Page 2

... Output low-pass filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 5.7 Protection function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 5.8 Differential input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 5.8.1 6 Electrical characterization curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 6.1 For the configuration with LC filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 6.2 For the configuration without filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 7 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 8 Heatsink provision . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 2/30 Single-ended input application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Doc ID 14570 Rev 5 TDA7493 ...

Page 3

... TDA7493 List of figures Figure 1. TDA7493 block diagram (only one of two channels shown Figure 2. Pin connection (top view Figure 3. Typical application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Figure 4. Input high-pass RC filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Figure 5. Device input structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Figure 6. Unipolar PWM output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Figure 7. Schematic for the filterless configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Figure 8. Master and slave modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Typical LC filter for 8 Ω ...

Page 4

... Pin list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Table 3. Absolute maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Table 4. Thermal data Table 5. Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Table 6. Mode selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Table 7. Gain selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Table 8. Resistance values for input configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Table 9. Master and slave mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Table 10. HTSSOP24 EPD dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Table 11. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 4/30 Doc ID 14570 Rev 5 TDA7493 ...

Page 5

... TDA7493 1 Device block diagram Figure 1 shows the block diagram of one of the two identical channels of the TDA7493. Figure 1. TDA7493 block diagram (only one of two channels shown) SVCC SGND ROSC INP INN GAIN0 GAIN1 SYNCLK SVR STANDBY Doc ID 14570 Rev 5 Device block diagram ...

Page 6

... The exposed pad is the device ground and must be connected appropriately 6/30 INNR 1 INNL 2 INPR INPL SVR 3 STANDBY PVCCPR 4 PVCCPL OUTPR 5 OUTPL 6 PGNDPR PGNDPL PGNDNR 7 PGNDNL OUTNR 8 OUTNL Exposed pad (GND) 9 PVCCNR PVCCNL GAIN1 10 SYNCLK GAIN0 11 ROSC 12 SVCC SGND Doc ID 14570 Rev 5 TDA7493 ...

Page 7

... TDA7493 2.2 Pin list Table 2. Pin list Number Name 1 INNL 2 INPL 3 STANDBY 4 PVCCPL 5 OUTPL 6 PGNDPL 7 PGNDNL 8 OUTNL 9 PVCCNL 10 SYNCLK 11 ROSC 12 SGND 13 SVCC 14 GAIN0 15 GAIN1 16 PVCCNR 17 OUTNR 18 PGNDNR 19 PGNDPR 20 OUTPR 21 PVCCPR 22 SVR 23 INPR 24 INNR Type IN Negative differential input of left channel IN Positive differential input of left channel ...

Page 8

... Typical application circuit Jumper 5 for single-ended input Jumper 6 for single-ended input 8/30 PVCCPL SVCC OUTPL STANDBY PGNDPL INPL PVCCNL INNL OUTNL ROSC TDA7493 PGNDNL GAIN0 PVCCPR GAIN1 OUTPR SYNCLK PGNDPR INPR PVCCNR INNR OUTNR SVR SGND PGNDNR Doc ID 14570 Rev 5 TDA7493 ...

Page 9

... TDA7493 4 Electrical specifications 4.1 Absolute maximum ratings Table 3. Absolute maximum rating Symbol DC supply on pins PVCCPL, PVCCPR, PVCCNL PVCCNR, SVCC Input on pins STANDBY, INNL, INPL, INNR, INPR, Vi GAIN0, GAIN1 Top Operating temperature Tstg, Tj Storage and junction temperature 4.2 Thermal data Table 4. Thermal data ...

Page 10

... SW Doc ID 14570 Rev 5 Min Typ Max - 0. 150 - GAIN1 = low - 6.0 - GAIN1 = high - 12.0 - GAIN1 = low - 15.6 - GAIN1 = high - 315 - (1) 250 - 400 (2) 250 - 400 - 1 - Play Standby 0 0 TDA7493 Unit % ° µV µV Ω Ω kHz kHz kHz µ ...

Page 11

... TDA7493 5 Application information 5.1 Mode selection Pin STANDBY selects the operating mode, namely standby or play. In standby mode, all the circuits are turned off and there is very low leakage current. In play mode, the amplifiers are powered up. During the turn on/off sequence, there are four operational states: standby, pre-charge, mute and play ...

Page 12

... Hz, the input capacitors could be 470 nF each polarized capacitor is used important to connect the positive side of the capacitor to the terminal with higher DC voltage. The DC voltage on the input pins is V Figure 5. Device input structure Input signal 12/ Doc ID 14570 Rev 5 TDA7493 / ...

Page 13

... TDA7493 can be used without a filter between the PWM output and the speaker since the switching frequency of the output is beyond the audible range. The audio signal can be recovered by the inherent inductance of the speaker and natural filter of the human ear. ...

Page 14

... Application information Figure 7. Schematic for the filterless configuration 14/30 Doc ID 14570 Rev 5 TDA7493 ...

Page 15

... The clock of the class-D amplifier can be generated internally or it can be synchronous with the external clock. If two or more class-D amplifiers are used in the same system better to have all devices working at the same frequency. This is realized by using one TDA7493 as clock master and the others as slaves. All SYNCLK pins are connected together as ...

Page 16

... Figure 10: Figure 10. Typical LC filter for 4 Ω speaker OUTP OUTN 16/30 Figure 9. 33 µH 330 pF 20 Ω 33 µH 15 µH 330 pF 20 Ω 15 µH Doc ID 14570 Rev 5 TDA7493 0.10 µF 0.47 µF 8 Ω 0.10 µF 0.22 µF 0.47 µF 4 Ω 0.22 µF ...

Page 17

... Differential input The TDA7493 can be used with either differential or single-ended inputs. In either case, the device must be AC coupled to the audio source. To use the device with a differential source, connect the positive lead from the audio source to the INP input and the negative lead to the INN input as shown in differential input stage of the amplifier minimizes the common mode noise effectively ...

Page 18

... Cin cin INN GND Figure 12 Figure Cin OUTP R0 Cin GND R0 Doc ID 14570 Rev 5 TDA7493 12. TDA7493 Rfb + Rin - Rin Rfb Input stage can be different it is necessary to 13. In this way the currents in the two TDA7493 Rfb INP + Rin INN - Rin Rfb Input stage ...

Page 19

... Rfb = 30 k and Ω Ω , Rfb = 120 k and Cin OUTP R0 Cin GND Doc ID 14570 Rev 5 Application information Ω , the gain is reduced by 1 dB. Ω , the gain is reduced by 1.84 dB. In Ω . TDA7493 Rfb INP + Rin INN - Rin Rfb Input stage 19/30 ...

Page 20

... Po (W) 10 THD 5 (%) 2 1 0.5 0.2 0.1 0.05 0.02 0.01 0.005 0.002 0.001 100m 200m 300m 400m 500m 700m Po (W) 10 THD 5 (%) 2 1 0.5 0.2 0.1 0.05 0.02 0. 100 200 500 1k Frequency Doc ID 14570 Rev 5 TDA7493 10k 20k ...

Page 21

... TDA7493 Figure 18. THD vs frequency Figure 19. Output frequency response Figure 20. Crosstalk vs frequency THD 5 (%) 2 1 0.5 0.2 0.1 0.05 0.02 0.01 0.005 0.002 0.001 20 50 100 200 500 1k Frequency +2 Ampl (dB 100 200 500 1k Frequency (Hz Crosstalk -10 (dB) -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 ...

Page 22

... Frequency (Hz) +10 FFT +0 (dB) -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 -130 -140 -150 20 50 100 200 500 1k Frequency (Hz) Doc ID 14570 Rev 10k 20k 2k 5k 10k 20k TDA7493 ...

Page 23

... TDA7493 6.2 For the configuration without filter Test setup as given in Test conditions V Figure 23. THD vs output power at 1 kHz Figure 24. THD vs output power at 100 Hz Figure 25. THD vs frequency at 100 mW Figure 7 on page Ω + 270 µ filter = 5 V, C20 = 10 µ THD (%) 0.5 0.2 0.1 ...

Page 24

... Ampl (dB 100 200 500 1k frequency (Hz +40 +20 +0 -20 -40 -60 -80 -100 -120 -140 20 50 100 200 500 1k frequency (Hz) Doc ID 14570 Rev 10k 20k 2k 5k 10k 20k 50k 2k 5k 10k 20k TDA7493 ...

Page 25

... TDA7493 Figure 29. FFT (0 dB) Figure 30. FFT (-60 dB) +10 FFT +0 (dB) -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 -130 -140 -150 20 50 100 200 500 1k frequency (Hz) +10 FFT +0 (dB) -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 -130 -140 -150 20 50 100 200 500 ...

Page 26

... Package mechanical data 7 Package mechanical data The TDA7493 comes in a 24-pin HTSSOP exposed-pad-down package. The outline is shown in Figure 31 The package code is YO and the JEDEC/EIAJ reference number is JEDEC MO-153-ADT. Figure 31. HTSSOP24 EPD outline 26/30 and the dimensions are given in Doc ID 14570 Rev 5 ...

Page 27

... TDA7493 Table 10. HTSSOP24 EPD dimensions Reference Min 0.80 b 0.19 c 0.09 D 7.70 D1 4.80 E 6.20 E1 4. aaa - Dimension D does not include mold flash, protrusions or gate burrs. Mold flash, protrusions or gate burrs shall not exceed 0.15mm (0.006 inch) per side. 2. Dimension E1 does not include interlead flash or protrusions. Interlead flash or protrusions does not exceed 0 ...

Page 28

... The amount of power dissipated within the device depends primarily on the supply voltage, load impedance and output modulation level. The maximum estimated power dissipation for the TDA7493 is around 1.1 W. With the suggested copper area than 40 °C above ambient can be expected, thus giving a maximum junction temperature, Tj, of approximately 90 ° ...

Page 29

... TDA7493 9 Revision history Table 11. Document revision history Date 02-Apr-2008 16-Sep-2008 01-Dec-2008 14-Dec-2008 14-Oct-2009 Revision 1 Initial release. Updated application schematic Updated Table 5: Electrical characteristics on page 9 2 Updated schematic of input structure Updated Schematic for the filterless configuration on page 14 Updated section 5.8: Differential input on page ...

Page 30

... Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Philippines - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America 30/30 Please Read Carefully: © 2009 STMicroelectronics - All rights reserved STMicroelectronics group of companies www.st.com Doc ID 14570 Rev 5 TDA7493 ...

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