MC100LVE222FA ON Semiconductor, MC100LVE222FA Datasheet

Clock Drivers & Distribution Low Voltage 1:15

MC100LVE222FA

Manufacturer Part Number

MC100LVE222FA

Description

Clock Drivers & Distribution Low Voltage 1:15

Manufacturer

ON Semiconductor

Type

ECL, PECLr

Datasheet

1.MC100LVE222FAR2.pdf (8 pages)

Specifications of MC100LVE222FA

Minimum Operating Temperature

- 40 C

Mounting Style

SMD/SMT

Multiply / Divide Factor

2:1

Number Of Clock Inputs

Output Logic Level

ECL

Supply Voltage (max)

+/- 5.25 V

Supply Voltage (min)

+/- 3 V

Maximum Operating Temperature

+ 85 C

Package / Case

LQFP-52

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

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MC100LVE222

3.3 V/5.0 V ECL 1:15

Differential ÷1/÷2 Clock Driver

fanout buffer designed with clock distribution in mind. The

LVECL/LVPECL input signal pairs can be differential or used

single-ended (with V

unused input of a pair). Either of two fully differential clock inputs may

be selected. Each of the four output banks of 2, 3, 4, and 6 differential

pairs may be independently configured to fanout 1X or 1/2X of the

input frequency. The LVE222 specifically guarantees low output to

output skew. Optimal design, layout, and processing minimize skew

within a device and from lot to lot.

changes may cause indeterminate output states requiring an MR pulse

to resynchronize any 1/2X outputs.

with a minimum occurring with only one output pair and increasing

about 10-20 ps for all output pairs. Relative skew distribution is not

affected as more pairs are terminated, but the increased tpd does shift

the entire distribution. Unused output pairs should be left unterminated

(open) to reduce power and switching noise.

from a positive V

LVE222 to be used for high performance clock distribution in +3.3 V

systems. Operation with >3.8 |(V

special thermal handling considerations. Designers can take advantage

of the LVE222's performance to distribute low skew clocks across the

backplane or the board. In a PECL environment series or Thevenin line,

terminations are typically used as they require no additional power

supplies. All power supply pins must be connected. For more

information on using PECL, designers should refer to Application Note

AN1406/D. For a SPICE model, refer to Application Note AN1560/D.

Features

•

*For additional information on our Pb-Free strategy and soldering details, please

November, 2007- Rev. 12

download the ON Semiconductor Soldering and Mounting Techniques

Reference Manual, SOLDERRM/D.

The MC100LVE222 is a low skew 1:15 differential ÷1/÷2 ECL

The fsel pins and CLK_Sel pin are asynchronous control inputs. Any

The device tpd is affected by the quantity of output pairs terminated

The MC100LVE222, as with most ECL devices, can be operated

to -5.25 V

For Additional Information, refer to Application Note AND8003/D

200 ps Part-to-Part Skew

50 ps Output-to-Output Skew

Selectable 1x or 1/2x Frequency Outputs

ESD Protection: >2 kV HBM, >200 V MM

The 100 Series Contains Temperature Compensation

PECL Mode Operating Range: V

NECL Mode Operating Range: V

Internal Input Pulldown Resistors

Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test

Moisture Sensitivity Level 2

Flammability Rating: UL 94 V-0 @ 0.125 in,

Transistor Count = 684 devices

Pb-Free Packages are Available*

= 0 V

CCO

output reference bypassed and connected to the

Oxygen Index: 28 to 34

supply in PECL mode. This allows the

or V

CCO

= 3.0 V to 5.25 V with

-V

= 0 V with V

| span will require

= -3.0 V

See detailed ordering and shipping information in the package

dimensions section on page 6 of this data sheet.

*For additional information, see Application Note

AND8002/D

CASE 848D

FA SUFFIX

LQFP

ORDERING INFORMATION

Location

Package

http://onsemi.com

= Assembly

= Wafer Lot

= Year

= Work Week

= Pb-Free

Publication Order Number:

MARKING DIAGRAM*

AWLYYWWG

MC100LVE

MC100LVE222/D

222

Related parts for MC100LVE222FA

MC100LVE222FA Summary of contents

Page 1

... Transistor Count = 684 devices • Pb-Free Packages are Available* *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. © Semiconductor Components Industries, LLC, 2007 November, 2007- Rev span will require ...

Page 2

VCCO 41 Qb2 42 Qb2 43 Qb1 44 Qb1 45 Qb0 MC100LVE222 46 Qb0 47 VCCO 48 Qa1 49 Qa1 50 Qa0 51 Qa0 52 VCCO ...

Page 3

CLK RESET Q 1/2Q Table 3. MAXIMUM RATINGS Symbol Parameter V /V PECL Mode Power Supply CC CCO V NECL Mode Power Supply EE V PECL Mode Input Voltage I NECL Mode Input Voltage I Output Current out I V ...

Page 4

Table 4. LVPECL DC CHARACTERISTICS Symbol Characteristic I Power Supply Current EE V Output HIGH Voltage (Note Output LOW Voltage (Note Input HIGH Voltage (Single-Ended Input LOW Voltage (Single-Ended Output ...

Page 5

Table 6. AC CHARACTERISTICS V Symbol Characteristic f Maximum Toggle Frequency max t Propagation Delay to Output PLH t IN (differential) (Note 8) PHL IN (single-ended) (Note 9) t Within-Device Skew (Note 10) skew Part-to-Part Skew (Differential Configuration) t Random ...

Page 6

... ORDERING INFORMATION Device MC100LVE222FA MC100LVE222FAG MC100LVE222FAR2 MC100LVE222FAR2G †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. Resource Reference of Application Notes AN1404 AN1405 AN1406 AN1503 AN1504 AN1560 AN1568 AN1596 ...

Page 7

H L VIEW -H- -T- q3 SEATING 4X PLANE NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: ...

Page 8

... Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada ...

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