LAN8710A-EZC-TR SMSC, LAN8710A-EZC-TR Datasheet
LAN8710A-EZC-TR
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LAN8710A-EZC-TR Summary of contents
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... IP and Video Phones Wireless Access Points Digital Televisions Digital Media Adaptors/Servers Gaming Consoles POE Applications (Refer to SMSC Application Note 17.18) SMSC LAN8710A/LAN8710Ai LAN8710A/LAN8710Ai ® Technology Key Benefits High-Performance 10/100 Ethernet Transceiver — Compliant with IEEE802.3/802.3u (Fast Ethernet) — Compliant with ISO 802-3/IEEE 802.3 (10BASE-T) — ...
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... LAN8710Ai-EZK for 32-pin, QFN lead-free RoHS compliant package (-40 to +85°C temp) LAN8710A-EZK-TR for 32-pin, QFN lead-free RoHS compliant package (0 to +85°C temp) LAN8710Ai-EZK-TR for 32-pin, QFN lead-free RoHS compliant package (-40 to +85°C temp) This product meets the halogen maximum concentration values per IEC61249-2-21 ...
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... Simplified System Level Application Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 3.9.2 Power Supply Diagram (1.2V Supplied by Internal Regulator 3.9.3 Power Supply Diagram (1.2V Supplied by External Source 3.9.4 Twisted-Pair Interface Diagram (Single Power Supply 3.9.5 Twisted-Pair Interface Diagram (Dual Power Supplies SMSC LAN8710A/LAN8710Ai ® Technology 3 DATASHEET Revision 1.2 (11-10-10) ...
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... Power-On nRST & Configuration Strap Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 5.5.4 MII Interface Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71 5.5.5 RMII Interface Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 5.5.6 SMI Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 5.6 Clock Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76 Chapter 6 Package Outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77 Chapter 7 Datasheet Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 Revision 1.2 (11-10-10) Small Footprint MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX and flexPWR 4 DATASHEET ® Technology Datasheet SMSC LAN8710A/LAN8710Ai ...
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... Figure 5.6 RMII Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 Figure 5.7 SMI Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 Figure 6.1 32-QFN Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77 Figure 6.2 Recommended PCB Land Pattern Figure 6.3 Taping Dimensions and Part Orientation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78 Figure 6.4 Reel Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79 Figure 6.5 Tape Length and Part Quantity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79 SMSC LAN8710A/LAN8710Ai ® Technology 5 DATASHEET Revision 1.2 (11-10-10) ...
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... Table 5.11 RMII CLKIN (REF_CLK) Timing Values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74 Table 5.12 SMI Timing Values Table 5.13 Crystal Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76 Table 6.1 32-QFN Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77 Table 7.1 Customer Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 Revision 1.2 (11-10-10) Small Footprint MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX and flexPWR 6 DATASHEET ® Technology Datasheet SMSC LAN8710A/LAN8710Ai ...
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... The LAN8710A/LAN8710Ai is a low-power 10BASE-T/100BASE-TX physical layer (PHY) transceiver with variable I/O voltage that is compliant with the IEEE 802.3-2005 standards. The LAN8710A/LAN8710Ai supports communication with an Ethernet MAC via a standard MII (IEEE 802.3u)/RMII interface. It contains a full-duplex 10-BASE-T/100BASE-TX transceiver and supports 10Mbps (10BASE-T) and 100Mbps (100BASE-TX) operation. The LAN8710A/LAN8710Ai implements auto-negotiation to automatically determine the best possible speed and duplex mode of operation ...
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... Equalizer 100M PLL Receiver Squeltch & Filters 10M PLL Figure 1.2 Architectural Overview 8 DATASHEET ® Technology Datasheet RJ45 HP Auto-MDIX TXP/TXN RXP/RXN MDIX Control XTAL1/CLKIN PLL XTAL2 Interrupt nINT Generator LED1 LEDs LED2 RBIAS Central Bias PHY Address PHYAD[0:2] Latches SMSC LAN8710A/LAN8710Ai ...
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... Note: When a lower case “n” is used at the beginning of the signal name, it indicates that the signal is active low. For example, nRST indicates that the reset signal is active low. Note: The buffer type for each signal is indicated in the BUFFER TYPE column. A description of the buffer types is provided in SMSC LAN8710A/LAN8710Ai ® Technology SMSC ...
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... Refer to Section 3.8.1.2, "nINTSEL and LED2 Polarity Selection," on page 38 details on how the nINTSEL configuration strap is used to determine the function of this pin. This signal is not used in RMII Mode. This signal is not used in RMII Mode. SMSC LAN8710A/LAN8710Ai for ...
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... Configuration 1 Strap Receive Data 3 (MII Mode) PHY Address 2 1 Configuration Strap SMSC LAN8710A/LAN8710Ai ® Technology Table 2.1 MII/RMII Signals (continued) BUFFER TYPE RXD0 VO8 Bit 0 of the RMII Mode) data bits that are sent by the transceiver on the receive path. MODE0 VIS Combined with MODE1 and MODE2, this configuration strap sets the default PHY mode ...
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... Unless configured to the Symbol Interface mode, this pin functions as RXER. for more information on Refer to Section 3.7.1, "PHYAD[2:0]: PHY Address Configuration," on page 35 for additional information. for more information on Refer to Section 3.7.1, "PHYAD[2:0]: PHY Address Configuration," on page 35 for additional information. SMSC LAN8710A/LAN8710Ai ...
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... Refer to Section 3.7, "Configuration Straps," on page 35 NUM PINS NAME SYMBOL LED 1 Regulator Off Configuration Strap 1 SMSC LAN8710A/LAN8710Ai ® Technology Table 2.1 MII/RMII Signals (continued) BUFFER TYPE CRS_DV VO8 This signal is asserted to indicate the receive medium is non-idle in RMII Mode. When a ...
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... Transmit/Receive Negative Channel 1 14 DATASHEET ® Technology Datasheet DESCRIPTION Refer to Section 3.8.1, "LEDs," on page 38 for additional LED information. for more information on Refer to See Section 3.8.1.2, "nINTSEL and LED2 Polarity Selection," on page 38 for additional information. for additional information. DESCRIPTION DESCRIPTION SMSC LAN8710A/LAN8710Ai ...
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... Table 2.6 Analog Reference Pins BUFFER TYPE RBIAS AI This pin requires connection of a 12.1k ohm (1%) resistor to ground. Refer to the LAN8710A/LAN8710Ai reference schematic for connection information. Note: The nominal voltage is 1.2V and the resistor will dissipate approximately 1mW of power. 15 DATASHEET DESCRIPTION ...
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... Analog Port Power to Channel 1 Refer to the LAN8710A/LAN8710Ai reference schematic for connection information. VDD2A P +3.3V Analog Port Power to Channel 2 and the internal regulator. Refer to the LAN8710A/LAN8710Ai reference schematic for connection information. VSS P Common ground. This exposed pad must be connected to the ground plane with a via array. 16 DATASHEET ® ...
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... PIN NUM PIN NAME 1 VDD2A 2 LED2/nINTSEL 3 LED1/REGOFF 4 XTAL2 5 XTAL1/CLKIN 6 VDDCR 7 RXCLK/PHYAD1 8 RXD3/PHYAD2 9 RXD2/RMIISEL 10 RXD1/MODE1 11 RXD0/MODE0 12 VDDIO 13 RXER/RXD4/PHYAD0 14 CRS 15 COL/CRS_DV/MODE2 16 MDIO SMSC LAN8710A/LAN8710Ai ® Technology PIN NUM PIN NAME 17 18 nINT/TXER/TXD4 DATASHEET MDC nRST TXCLK TXEN TXD0 TXD1 TXD2 TXD3 RXDV VDD1A ...
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... Sink and source capabilities are dependant on the VDDIO voltage. Refer to "Absolute Maximum Ratings*," on page 64 Revision 1.2 (11-10-10) Small Footprint MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX and flexPWR Table 2.9 Buffer Types DESCRIPTION Section 5.1, "Absolute Maximum Ratings*," on for additional information. 18 DATASHEET ® Technology Datasheet Section 5.1, SMSC LAN8710A/LAN8710Ai ...
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... For MII, the MAC controller drives the transmit data onto the TXD bus and asserts TXEN to indicate valid data. The data is latched by the transceiver’s MII block on the rising edge of TXCLK. The data is in the form of 4-bit wide 25MHz data. SMSC LAN8710A/LAN8710Ai ® Technology Figure 3 ...
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... Sent for rising TXEN Sent for falling TXEN Sent for falling TXEN 20 DATASHEET ® Technology Datasheet Table 3.1. Each 4-bit data- TRANSMITTER INTERPRETATION 0 0000 DATA 1 0001 2 0010 3 0011 4 0100 5 0101 6 0110 7 0111 8 1000 9 1001 A 1010 B 1011 C 1100 D 1101 E 1110 F 1111 SMSC LAN8710A/LAN8710Ai ...
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... Phase Lock Loop (PLL) The 100M PLL locks onto reference clock and generates the 125MHz clock used to drive the 125 MHz logic and the 100BASE-TX transmitter. SMSC LAN8710A/LAN8710Ai ® Technology Table 3.1 4B/5B Code Table (continued) RECEIVER ...
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... Each major block is explained in the PLL 25MHz by 4 bits 4B/5B MII/RMII Decoder 125 Mbps Serial DSP: Timing MLT-3 recovery, Equalizer and BLW Correction MLT-3 MLT-3 RJ45 6 bit Data 22 DATASHEET ® Technology Datasheet 25MHz by 5 bits Descrambler and SIPO CAT-5 SMSC LAN8710A/LAN8710Ai ...
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... SIGDET becomes false. RXDV is asserted when the first nibble of translated /J/K/ is ready for transfer over the Media Independent Interface (MII mode CLEAR-TEXT RX_CLK RX_DV RXD Figure 3.3 Relationship Between Received Data and Specific MII Signals SMSC LAN8710A/LAN8710Ai ® Technology data data data data 5 5 ...
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... The 4-bit wide data is sent to the 10M TX block. The nibbles are converted to a 10Mbps serial NRZI data stream. The 10M PLL locks onto the external clock or internal oscillator and produces a 20MHz Revision 1.2 (11-10-10) Small Footprint MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX and flexPWR 41, for more details. 24 DATASHEET ® Technology Datasheet SMSC LAN8710A/LAN8710Ai ...
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... Special logic is used to detect the jabber state and abort the transmission to the line within 45ms. Once TXEN is deasserted, the logic resets the jabber condition. As shown in Section 4.2.2, "Basic Status Register," on page jabber condition was detected. SMSC LAN8710A/LAN8710Ai ® Technology XPOL bit of the ...
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... Small Footprint MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX and flexPWR bits of the PHY Special Control/Status Register. The auto-negotiation protocol is a purely physical layer bit of the Basic Control Register Register. 26 DATASHEET ® Technology Datasheet Register, as well as in the Auto Auto Negotiation Advertisement Auto SMSC LAN8710A/LAN8710Ai ...
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... Parallel Detection If the LAN8710A/LAN8710Ai is connected to a device lacking the ability to auto-negotiate (i.e. no FLPs are detected able to determine the speed of the link based on either 100M MLT-3 symbols or 10M Normal Link Pulses. In this case the link is presumed to be half duplex per the IEEE standard. ...
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... Not Used Not Used 7 7 Not Used Not Used DATASHEET ® Technology Datasheet Figure 3.4, the device’s Auto-MDIX bit in the Special Control/Status signaling TXP 1 TXN 2 RXP 3 Not Used 4 Not Used 5 RXN 6 Not Used 7 Not Used 8 Cross-Over Cable SMSC LAN8710A/LAN8710Ai ...
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... It uses LVCMOS signal levels, compatible with common digital CMOS ASIC processes The RMII includes the following interface signals (1 optional): transmit data - TXD[1:0] transmit strobe - TXEN receive data - RXD[1:0] receive error - RXER (Optional) SMSC LAN8710A/LAN8710Ai ® Technology Section 3.4.3, "MII vs. RMII Configuration," on page 30 29 DATASHEET for information on pin Revision 1 ...
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... MII and RMII mode signal names. Revision 1.2 (11-10-10) Small Footprint MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX and flexPWR 36. Table 3.2, "MII/RMII Signal Mapping" 30 DATASHEET ® Technology Datasheet Section 3.7.3, "RMIISEL: describes the SMSC LAN8710A/LAN8710Ai ...
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... In RMII mode, this pin needs to tied to VSS. Note 3.2 The RXER signal is optional on the RMII bus. This signal is required by the transceiver, but it is optional for the MAC. The MAC can choose to ignore or not use this signal. SMSC LAN8710A/LAN8710Ai ® Technology Table 3.2 MII/RMII Signal Mapping ...
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... The timing relationships of the MDIO signals are 75. Read Cycle PHY Address Register Address Data To Phy Write Cycle PHY Address Register Address Data To Phy 32 DATASHEET ® Technology Datasheet Chapter 4, "Register Descriptions," ... ... D1 D15 D14 D0 Turn Data Around Data From Phy ... ... D15 D14 D1 D0 Turn Data Around SMSC LAN8710A/LAN8710Ai ...
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... Cable is unplugged. To prevent an unexpected assertion of nINT, the ENERGYON interrupt mask should always be cleared as part of the ENERGYON interrupt service routine. Note: The ENERGYON signal acquisition process, therefore the SMSC LAN8710A/LAN8710Ai ® Technology Table 3.3 Interrupt Management Table EVENT TO INTERRUPT SOURCE ASSERT nINT 17 ...
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... Interrupt Mask Register will also read ENERGYON and INT7 will clear within SMSC LAN8710A/LAN8710Ai to ...
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... MODE[2:0] configuration straps have no affect. The device’s mode may be configured using the hardware configuration straps as summarized in Table 3.6. The user may configure the transceiver mode by writing the SMI registers. SMSC LAN8710A/LAN8710Ai ® Technology Section 5.5.3, "Power-On nRST & Configuration Strap Timing," on ...
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... Special Modes Register 36 DATASHEET ® Technology Datasheet DEFAULT REGISTER BIT VALUES REGISTER 0 REGISTER 4 [13,12,10,8] [8,7,6,5] 0000 N/A 0001 N/A 1000 N/A 1001 N/A 1100 0100 1100 0100 N/A N/A X10X 1111 Table is loaded according and the RMIISEL configuration strap has SMSC LAN8710A/LAN8710Ai 3.7. ...
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... Note: Because the nINTSEL configuration strap shares functionality with the LED2 pin, proper consideration must also be given to the LED polarity. Refer to LED2 Polarity Selection," on page 38 nINTSEL and the LED2 polarity. SMSC LAN8710A/LAN8710Ai ® Technology for additional information on MII and RMII Section 3.8.1.1, " ...
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... Small Footprint MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX and flexPWR and Section 3.8.1.1, "REGOFF and LED1 Polarity Selection," Figure 3.7 REGOFF = 0 (Regulator ON) LED output = Active High LED1/REGOFF ~270 ohms 38 DATASHEET ® Technology Datasheet Section 3.8.1.2, details the LED1 polarity for for SMSC LAN8710A/LAN8710Ai ...
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... In this mode, when the powered-down and nothing is transmitted. When energy is received via link pulses or packets, the ENERGYON bit goes high and the transceiver powers-up. The device automatically resets into the SMSC LAN8710A/LAN8710Ai ® Technology Figure 3.8 details the LED2 polarity for each nINTSEL configuration. ...
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... In isolation mode, the transceiver does not respond to the TXD, Section 5.5.3, "Power-On nRST & Configuration Strap Timing," Soft Reset bit of the 40 DATASHEET ® Technology Datasheet is low, energy detect power-down is Isolate bit Section 5.5.3, for additional information. Basic Control Register to “1”. All SMSC LAN8710A/LAN8710Ai ...
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... TXEN. TXD 10/100 Ethernet RXD MAC Digital Ethernet Transceiver Figure 3.9 Near-end Loopback Block Diagram SMSC LAN8710A/LAN8710Ai ® Technology Collision Test bit of the and to drive the LINK LED (LED1). Figure 3.9. The near-end loopback mode is enabled by Basic Control Register to “ ...
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... SMSC Figure 3.11. An RJ45 loopback cable can be used to route the transmit signals TX XFMR RX Analog SMSC 42 DATASHEET ® Technology Datasheet FARLOOPBACK bit of the Mode Link CAT-5 Partner RJ45 Loopback Cable. Created by connecting pin 1 to pin 3 and connecting pin 2 to pin 6. SMSC LAN8710A/LAN8710Ai ...
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... MII MDIO MDC nINT TXD[3:0] 4 TXCLK TXER TXEN RXD[3:0] 4 RXCLK RXDV LED[2:1] 2 nRST Interface Figure 3.12 Simplified System Level Application Diagram SMSC LAN8710A/LAN8710Ai ® Technology LAN8710A/LAN8710Ai 10/100 PHY 32-QFN MII TXP TXN RXP RXN XTAL1/CLKIN XTAL2 43 DATASHEET Mag RJ45 25MHz Revision 1.2 (11-10-10) ...
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... Small Footprint MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX and flexPWR LAN8710A/LAN8710Ai 32-QFN Ch.2 3.3V Core Logic Circuitry VDDCR Internal OUT IN Regulator VDDIO Ch.1 3.3V Circuitry C BYPASS LED1/ REGOFF ~270 Ohm 44 DATASHEET ® Technology Datasheet Power Supply 3.3V VDD2A C BYPASS VDD1A C BYPASS RBIAS 12.1k VSS SMSC LAN8710A/LAN8710Ai ...
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... Small Footprint MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX and flexPWR Datasheet 3.9.3 Power Supply Diagram (1.2V Supplied by External Source) VDDCR Supply 1.2V C VDDDIO Supply 1 Figure 3.14 Power Supply Diagram (1.2V Supplied by External Source) SMSC LAN8710A/LAN8710Ai ® Technology LAN8710A/LAN8710Ai 32-QFN Ch.2 3.3V Core Logic Circuitry Internal VDDCR OUT IN Regulator (Disabled) VDDIO Ch ...
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... TXN RXP RXN Figure 3.15 Twisted-Pair Interface Diagram (Single Power Supply) Revision 1.2 (11-10-10) Small Footprint MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX and flexPWR Ferrite bead 49.9 Ohm Resistors C BYPASS C Magnetics BYPASS C BYPASS 46 DATASHEET ® Technology Datasheet RJ45 1000 SMSC LAN8710A/LAN8710Ai ...
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... Datasheet 3.9.5 Twisted-Pair Interface Diagram (Dual Power Supplies) LAN8710A/LAN8710Ai Power 32-QFN Supply 3.3V VDD2A VDD1A TXP TXN RXP RXN Figure 3.16 Twisted-Pair Interface Diagram (Dual Power Supplies) SMSC LAN8710A/LAN8710Ai ® Technology 49.9 Ohm Resistors C BYPASS C Magnetics BYPASS C BYPASS 47 DATASHEET Power Supply 2 ...
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... R/W: Can be written. Will return current setting on a read. R/WAC: Will return current setting on a read. Writing anything clears the bit. Revision 1.2 (11-10-10) Small Footprint MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX and flexPWR Table 4.1 Register Bit Types REGISTER BIT DESCRIPTION 48 DATASHEET ® Technology Datasheet SMSC LAN8710A/LAN8710Ai ...
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... Mode Control/Status Register 18 Special Modes 26 Symbol Error Counter Register 27 Control / Status Indication Register 29 Interrupt Source Register 30 Interrupt Mask Register 31 PHY Special Control/Status Register SMSC LAN8710A/LAN8710Ai ® Technology Table 4.2 SMI Register Map REGISTER NAME 49 DATASHEET GROUP Basic Basic Extended Extended Extended ...
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... Small Footprint MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX and flexPWR Size: 16 bits DESCRIPTION Section 3.7.2, 35) is set from the register bit 50 DATASHEET ® Technology Datasheet TYPE DEFAULT R R/W 0b R/W Note 4.1 R/W Note 4.1 R/W 0b R R/W Note 4.1 R for additional information. SMSC LAN8710A/LAN8710Ai ...
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... Link Status 0 = link is down 1 = link Jabber Detect jabber condition detected 1 = jabber condition detected 0 Extended Capabilities 0 = does not support extended capabilities registers 1 = supports extended capabilities registers SMSC LAN8710A/LAN8710Ai ® Technology Size: 16 bits DESCRIPTION 51 DATASHEET TYPE DEFAULT ...
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... PHY ID Number Assigned to the 3rd through 18th bits of the Organizationally Unique Identifier (OUI), respectively. Revision 1.2 (11-10-10) Small Footprint MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX and flexPWR Size: 16 bits DESCRIPTION 52 DATASHEET ® Technology Datasheet TYPE DEFAULT R/W 0007h SMSC LAN8710A/LAN8710Ai ...
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... Assigned to the 19th through 24th bits of the OUI. 9:4 Model Number Six-bit manufacturer’s model number. 3:0 Revision Number Four-bit manufacturer’s revision number. Note 4.2 The default value of this field will vary dependant on the silicon revision number. SMSC LAN8710A/LAN8710Ai ® Technology Size: 16 bits DESCRIPTION 53 DATASHEET TYPE ...
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... Revision 1.2 (11-10-10) Small Footprint MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX and flexPWR Size: 16 bits DESCRIPTION 54 DATASHEET ® Technology Datasheet TYPE DEFAULT R/W 00b RO - R/W Note 4.3 R/W 1b R/W Note 4.3 R/W Note 4.3 R/W 00001b for additional information. SMSC LAN8710A/LAN8710Ai ...
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... TX full duplex ability with full duplex 7 100BASE- ability able 6 10BASE-T Full Duplex 10Mbps with full duplex ability 1 = 10Mbps with full duplex 5 10BASE 10Mbps ability 1 = 10Mbps able 4:0 Selector Field 00001 = IEEE 802.3 SMSC LAN8710A/LAN8710Ai ® Technology Size: 16 bits DESCRIPTION 55 DATASHEET TYPE DEFAULT ...
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... Link Partner Auto-Negotiation Able 0 = link partner does not have auto-negotiation ability 1 = link partner has auto-negotiation ability Revision 1.2 (11-10-10) Small Footprint MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX and flexPWR Size: 16 bits DESCRIPTION 56 DATASHEET ® Technology Datasheet TYPE DEFAULT RO - RO/ RO/ SMSC LAN8710A/LAN8710Ai ...
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... ENERGYON Indicates whether energy is detected. This bit transitions to “0” valid energy is detected within 256ms reset to “1” hardware reset and is unaffected by a software reset. Refer to Power-Down," on page 39 0 RESERVED SMSC LAN8710A/LAN8710Ai ® Technology Size: DESCRIPTION for additional for additional Section 3.8.3.2, " ...
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... Small Footprint MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX and flexPWR Size: DESCRIPTION Section 3.7.3, 36: Section 3.7.2, "MODE[2:0]: Mode for additional details. Section 3.7.1, for additional details. 58 DATASHEET ® Technology Datasheet 16 bits TYPE DEFAULT RO - R/W 0b NASR RO - R/W Note 4.4 NASR R/W Note 4.5 NASR for additional information. for additional SMSC LAN8710A/LAN8710Ai ...
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... This counter increments up to 65,536 (2 rolls over to 0 after reaching the maximum value. Note: This register is cleared on reset, but is not cleared by reading the register. This register does not increment in 10BASE-T mode. SMSC LAN8710A/LAN8710Ai ® Technology Size: 16 bits ...
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... MDIX (TX receives, RX transmits) 12:11 RESERVED 10:5 RESERVED 4 XPOL Polarity state of the 10BASE- Normal polarity 1 = Reversed polarity 3:0 RESERVED Revision 1.2 (11-10-10) Small Footprint MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX and flexPWR Size: 16 bits DESCRIPTION 60 DATASHEET ® Technology Datasheet TYPE DEFAULT R R SMSC LAN8710A/LAN8710Ai ...
Page 61
... Link Down (link status negated) 3 INT3 0 = not source of interrupt 1 = Auto-Negotiation LP Acknowledge 2 INT2 0 = not source of interrupt 1 = Parallel Detection Fault 1 INT1 0 = not source of interrupt 1 = Auto-Negotiation Page Received 0 RESERVED SMSC LAN8710A/LAN8710Ai ® Technology Size: 16 bits DESCRIPTION 61 DATASHEET TYPE DEFAULT RO - RO/LH 0b RO/LH 0b ...
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... Section 4.2.12, "Interrupt Source Flag Register," on page 61 for details on the corresponding interrupt definitions. 0 RESERVED Revision 1.2 (11-10-10) Small Footprint MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX and flexPWR Size: 16 bits DESCRIPTION 62 DATASHEET ® Technology Datasheet TYPE DEFAULT RO - R/W 0000000b RO - SMSC LAN8710A/LAN8710Ai ...
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... Auto-negotiation is not done or disabled (or not active Auto-negotiation is done 11:5 RESERVED - Write as 0000010b, ignore on read. 4:2 Speed Indication HCDSPEED value: 001 = 10BASE-T half-duplex 101 = 10BASE-T full-duplex 010 = 100BASE-TX half-duplex 110 = 100BASE-TX full-duplex 1:0 RESERVED SMSC LAN8710A/LAN8710Ai ® Technology Size: 16 bits DESCRIPTION 63 DATASHEET TYPE DEFAULT ...
Page 64
... JA (Note 5. .+/-8kV (Note 5. .+/-15kV o C for extended commercial version, -40 Conditions**", Section 5.1, "Absolute Maximum 64 DATASHEET ® Technology Datasheet 5. +6V 5. -0.5V Note 5. +150 o C +85 C for industrial version. Ratings*", or any other SMSC LAN8710A/LAN8710Ai o C ...
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... GENERAL POWER DOWN Note: The current at VDDCR is either supplied by the internal regulator from current entering at VDD2A, or from an external 1.2V supply when the internal regulator is disabled. SMSC LAN8710A/LAN8710Ai ® Technology ). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
Page 66
... I/O buffer characteristics. Typical values are MIN TYP MAX -0.3 3.6 1.01 1.19 1.39 1.39 1.59 1.79 336 399 459 - 0.4 VDD2A - 0.4 -0.3 0.35 1.4 VDD2A + 0.4 66 DATASHEET ® Technology Datasheet UNITS NOTES Schmitt trigger V Schmitt trigger mV uA Note 5 12mA -12mA OH Note 5 SMSC LAN8710A/LAN8710Ai ...
Page 67
... Rise and Fall Symmetry Duty Cycle Distortion Overshoot and Undershoot Jitter Note 5.10 Measured at line side of transformer, line replaced by 100 Ω (+/- 1%) resistor. Note 5.11 Offset from 16nS pulse width at 50% of pulse peak. Note 5.12 Measured differentially. SMSC LAN8710A/LAN8710Ai ® Technology 1.8V 2.5V 3.3V MIN ...
Page 68
... OUTPUT Revision 1.2 (11-10-10) Small Footprint MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX and flexPWR SYMBOL MIN TYP V 2.2 OUT V 300 Figure 5.1 Output Equivalent Test Load 68 DATASHEET ® Technology Datasheet MAX UNITS NOTES 2.5 2.8 V Note 5.13 420 585 mV SMSC LAN8710A/LAN8710Ai ...
Page 69
... Note: When the internal regulator is disabled, a power-up sequencing relationship exists between VDDCR and the 3.3V power supply. For additional information refer to "REGOFF: Internal +1.2V Regulator Configuration," on page SMSC LAN8710A/LAN8710Ai ® Technology . Device power supplies can turn off in any order provided they all reach pon ...
Page 70
... MIN 25 0 100 200 1 2 for details. Configuration straps must only be pulled high or 70 DATASHEET ® Technology Datasheet and t css csh for additional t csh t odad TYP MAX UNITS mS nS μ 800 nS (Note 5.14) Section 3.7, SMSC LAN8710A/LAN8710Ai ...
Page 71
... RXCLK t RXD[3:0], RXDV output hold from rising edge of hold RXCLK Note 5.15 40ns for 100BASE-TX operation, 400ns for 10BASE-T operation. Note 5.16 Timing was designed for system load between 10 pf and 25 pf. SMSC LAN8710A/LAN8710Ai ® Technology t clkp t t clkh clkl ...
Page 72
... Figure 5.5 MII Transmit Timing Table 5.9 MII Transmit Timing Values MIN Note 5.17 t *0.4 clkp t *0.4 clkp 12 DATASHEET ® Technology Datasheet t hold t su MAX UNITS NOTES ns t *0.6 ns clkp t *0.6 ns clkp ns Note 5.18 ns Note 5.18 SMSC LAN8710A/LAN8710Ai ...
Page 73
... CLKIN t TXD[1:0], TXEN setup time to rising edge of su CLKIN t TXD[1:0], TXEN input hold time after rising edge ihold of CLKIN Note 5.19 Timing was designed for system load between 10 pf and 25 pf. SMSC LAN8710A/LAN8710Ai ® Technology t clkp t t clkh clkl t ...
Page 74
... CLKIN Frequency Drift CLKIN Duty Cycle CLKIN Jitter Revision 1.2 (11-10-10) Small Footprint MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX and flexPWR MIN TYP MAX UNITS 50 MHz ± 50 ppm 40 60 150 psec 74 DATASHEET ® Technology Datasheet NOTES % p-p – not RMS SMSC LAN8710A/LAN8710Ai ...
Page 75
... MDIO (read from PHY) output hold from rising t ohold edge of MDC MDIO (write to PHY) setup time to rising edge MDC MDIO (write to PHY) input hold time after rising t ihold edge of MDC SMSC LAN8710A/LAN8710Ai ® Technology for additional details. t clkp t t clkh clkl t ohold t Figure 5 ...
Page 76
... L P 300 - Note 5. typ - 3 typ o C for industrial version. 76 DATASHEET ® Technology Datasheet Table 5.13 for the MAX UNITS NOTES - MHz ±50 PPM Note 5.20 ±50 PPM Note 5.20 - PPM Note 5.21 ±50 PPM Note 5. Ohm o + Note 5. Note 5.24 SMSC LAN8710A/LAN8710Ai ...
Page 77
... All dimensions are in millimeters unless otherwise noted. 2. Dimension “b” applies to plated terminals and is measured between 0.15 and 0.30 mm from the terminal tip. 3. The pin 1 identifier may vary, but is always located within the zone indicated. SMSC LAN8710A/LAN8710Ai ® Technology Figure 6.1 32-QFN Package Table 6 ...
Page 78
... Figure 6.2 Recommended PCB Land Pattern Figure 6.3 Taping Dimensions and Part Orientation Revision 1.2 (11-10-10) Small Footprint MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX and flexPWR 78 DATASHEET ® Technology Datasheet SMSC LAN8710A/LAN8710Ai ...
Page 79
... Small Footprint MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX and flexPWR Datasheet Figure 6.5 Tape Length and Part Quantity Note: Standard reel size is 4,000 pieces per reel. SMSC LAN8710A/LAN8710Ai ® Technology Figure 6.4 Reel Dimensions 79 DATASHEET Revision 1.2 (11-10-10) ...
Page 80
... Added far loopback description. Added FARLOOPBACK (bit 9) description. 80 DATASHEET ® Technology Datasheet CORRECTION Table 5.8 t max to 28.0 ns. val t and t values to 12 hold description: “Output drive after minimum value to “VDD2A - OH maximum value to “0.35” ILI maximum value to “VDD2A + IHI SMSC LAN8710A/LAN8710Ai ...
Page 81
... Table 7.1 Customer Revision History (continued) REVISION LEVEL & DATE SECTION/FIGURE/ENTRY Table 5.9, “MII Transmit Timing Values,” on page 72 Rev. 1.0 (12-09-09) Document reworked for clarity and consistency with other SMSC documentation. Rev. 1.0 (04-15-09) Initial Release SMSC LAN8710A/LAN8710Ai ® Technology CORRECTION Corrected t and t su hold 81 DATASHEET minimum values ...