DS2155G/T&R Maxim Integrated Products, DS2155G/T&R Datasheet - Page 61
DS2155G/T&R
Manufacturer Part Number
DS2155G/T&R
Description
Network Controller & Processor ICs T1/E1/J1 Single-Chip gle-Chip Transceiver
Manufacturer
Maxim Integrated Products
Datasheet
1.DS2155L.pdf
(238 pages)
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Table 10-B. E1 Alarm Criteria
V52LNK
ALARM
RDMA
RLOS
RUA1
RRA
RCL
An RLOS condition exists on power-up
prior to initial synchronization, when a
resync criteria has been met, or when a
manual resync has been initiated by
E1RCR1.0
255 or 2048 consecutive 0s received as
determined by E1RCR2.0
Bit 3 of nonalign frame set to 1 for three
consecutive occasions
Fewer than three 0s in two frames (512
bits)
Bit 6 of time slot 16 in frame 0 has been set
for two consecutive multiframes
Two out of three Sa7 bits are 0
SET CRITERIA
61 of 238
At least 32 1s in 255-bit times
are received
Bit 3 of nonalign frame set to
0 for three consecutive
occasions
More than two 0s in two
frames (512 bits)
CLEAR CRITERIA
SPECIFICATION
G.775/G.962
1.6.1.2
O.162
O.162
G.965
2.1.4
ITU
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