STLC5465B STMicroelectronics, STLC5465B Datasheet - Page 17

• Manufacturer Part Number: STLC5465B
• Description: Telecom ICs Multi-HDLC Sw Matrix
• Manufacturer: STMicroelectronics
• Type: Telecom IC - Variousr

Specifications of STLC5465B

• Operating Supply Voltage: 4.75 V to 5.25 V
• Operating Temperature Range: - 40 C to + 85 C
• Mounting Style: SMD/SMT
• Package / Case: PQFP-160
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

III - FUNCTIONAL DESCRIPTION (continued)
Figure 3 : Unidirectional and Bidirectional Connections
Figure 4 : Loop Back
III.1.5 - Delay through the Matrix
III.1.5.1 - Variable Delay Mode
In the variable delay mode, the delay through the
matrix dependson the relative positionsof the input
and output time slots in the frame.
So, some limits are fixed :
- the maximum delay is a frame + 2 time slots,
- the minimum delay is programmable.
All the possibilities can be ranked in three cases :
a) If OTSy > ITSx + n then the variable delay is :
Three time slots if IMTD = 1, in this case n = 2 in
the formula hereafter or two time slots if
IMTD = 0, in this case n = 1 in the same formula
(see Paragraph ”Switching Matrix Configuration
Reg SMCR (0C)H” on Page 64).
DOWN STREAM
OTSy, OTDMq
OTSy - ITSx Time slots
UP STREAM
ITSy, ITDMq
Loopback per channel relevant if bidirectional connection has been done.
DOWN STREAM
DOWN STREAM
OTSy, OTDMq
OTSy, OTDMq
UP STREAM
ITSy, ITDMq
Unidirectional Connection
Bidirectional Connection
OTSV
n x 64kb/s
n x 64kb/s
n x 64kb/s
MEMORY
MEMORY
MEMORY
DATA
DATA
DATA
Loop
n x 64kb/s
n x 64kb/s
b) If ITSx < OTSy < ITSx + n then the variable delay
is :
c) OTSy < ITSx then the variable delay is :
N.B. Rule b) and rule c) are identical.
For n = 1 and n = 2, see Figure 5 on Page 18.
III.1.5.2 - Sequence Integrity Mode
In the sequence integrity mode (SI = 1, bit located
in the Connection Memory), the input time slots are
put out 2 frames later (fig. 6 - page 19). In this case,
the delay is defined by a single expression :
So, the delay in sequence integrity mode varies
from 33 to 95 time slots.
MEMORY
MEMORY
DATA
DATA
Constant Delay = (32 - ITSx) + 32 + OTSy
DOWN STREAM
DOWN STREAM
OTSx, OTDMp
UP STREAM
ITSx,ITDMp
ITSx,ITDMp
32 - (ITSx - OTSy) Time slots.
OTSy - ITSx + 32 Time slots
DOWN STREAM
OTSx, OTDMp
UP STREAM
ITSx,ITDMp
x, y = 0 to 31
p, q = 0 to 7
x, y = 0 to 31
p, q = 0 to 7
STLC5465B
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