STD45NF75T4 STMicroelectronics, STD45NF75T4 Datasheet
STD45NF75T4
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STD45NF75T4 Summary of contents
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... The resulting transistor shows extremely high packing density for low on- resistance, rugged avalanche characteristics and less critical alignment steps therefore a remarkable manufacturing reproducibility. Table 1. Device summary Order code STD45NF75T4 May 2009 N-channel 75 V, 0.018 Ω DPAK STripFET™ II Power MOSFET max I DS(on) D < ...
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Contents Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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STD45NF75 1 Electrical ratings Table 2. Absolute maximum ratings Symbol V Drain-source voltage ( Drain-gate voltage (R DGR V Gate- source voltage GS (1) I Drain current (continuous Drain current (continuous ...
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Electrical characteristics 2 Electrical characteristics (T =25 °C unless otherwise specified) CASE Table 4. On/off states Symbol Drain-source V (BR)DSS breakdown voltage Zero gate voltage I DSS drain current (V Gate-body leakage I GSS current (V V Gate threshold voltage ...
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STD45NF75 Table 6. Source drain diode Symbol Source-drain current I SD Source-drain current (1) I SDM (pulsed) (2) V Forward on voltage SD t Reverse recovery time rr Q Reverse recovery charge rr I Reverse recovery current RRM 1. Pulse ...
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Electrical characteristics 2.1 Electrical characteristics (curves) Figure 2. Safe operating area I D (A) 100 10 Tj=150°C Tc=25°C 1 Sinlge pulse 0.1 0.1 1 Figure 4. Output characteristics Figure 6. Transconductance 6/16 Figure 3. AM03943v1 100µs 10 1ms 10ms 10 ...
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STD45NF75 Figure 8. Gate charge vs. gate-source voltage Figure 10. Normalized gate threshold voltage vs. temperature Figure 12. Source-drain diode forward characteristics Figure 9. Capacitance variations Figure 11. Normalized on resistance vs. temperature Figure 13. Normalized breakdown voltage vs. temperature ...
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Electrical characteristics Figure 14. Power derating vs. Tj Figure 16. Thermal resistance Rthj-a vs. pcb copper area 8/16 Figure 15. Max Id current vs. Tc Figure 17. Max power dissipation vs. pcb copper area Doc ID 9902 Rev 5 STD45NF75 ...
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STD45NF75 Figure 18. Allowable Iav vs. time in avalanche The previous curve gives the safe operating area for unclamped inductive loads, single pulse or repetitive, under the following conditions 0 D(AVE ...
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Spice thermal model 3 Spice thermal model Table 7. Spice parameter Parameter CTHERM1 CTHERM2 CTHERM3 CTHERM4 CTHERM5 CTHERM6 RTHERM1 RTHERM2 RTHERM3 RTHERM4 RTHERM5 RTHERM6 Figure 19. Thermal network 10/16 Node ...
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STD45NF75 4 Test circuits Figure 20. Switching times test circuit for resistive load D.U. Figure 22. Test circuit for inductive load switching and diode recovery times ...
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Package mechanical data 5 Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ® ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available ...
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STD45NF75 DIM TO-252 (DPAK) mechanical data mm ...
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Packing mechanical data 6 Packing mechanical data DPAK FOOTPRINT All dimensions are in millimeters TAPE MECHANICAL DATA mm DIM. MIN. MAX. A0 6.8 B0 10.4 10.6 B1 12.1 D 1.5 D1 1.5 E 1.65 1.85 F 7.4 K0 2.55 2.75 ...
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STD45NF75 7 Revision history Table 8. Document revision history Date 22-Jun-2004 09-Sep-2004 11-Jul-2006 20-Feb-2007 20-May-2009 Revision 1 Preliminary version 2 Complete version 3 New template, no content change 4 Typo mistake on page 1 Figure 2 Figure 3 5 and ...
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... Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. ...