FDMA510PZ Fairchild Semiconductor, FDMA510PZ Datasheet - Page 2

MOSFET P-CH 20V 7.8A 6-MICROFET

FDMA510PZ

Manufacturer Part Number
FDMA510PZ
Description
MOSFET P-CH 20V 7.8A 6-MICROFET
Manufacturer
Fairchild Semiconductor
Series
PowerTrench®r
Type
Power MOSFETr
Datasheet

Specifications of FDMA510PZ

Fet Type
MOSFET P-Channel, Metal Oxide
Fet Feature
Logic Level Gate
Rds On (max) @ Id, Vgs
30 mOhm @ 7.8A, 4.5V
Drain To Source Voltage (vdss)
20V
Current - Continuous Drain (id) @ 25° C
7.8A
Vgs(th) (max) @ Id
1.5V @ 250µA
Gate Charge (qg) @ Vgs
27nC @ 4.5V
Input Capacitance (ciss) @ Vds
1480pF @ 10V
Power - Max
900mW
Mounting Type
Surface Mount
Package / Case
6-MLP, 6-MicroFET™
Configuration
Single Quad Drain
Transistor Polarity
P-Channel
Resistance Drain-source Rds (on)
0.03 Ohm @ 4.5 V
Drain-source Breakdown Voltage
20 V
Gate-source Breakdown Voltage
+/- 8 V
Continuous Drain Current
7.8 A
Power Dissipation
2400 mW
Maximum Operating Temperature
+ 150 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 55 C
Number Of Elements
1
Polarity
P
Channel Mode
Enhancement
Drain-source On-res
0.03Ohm
Drain-source On-volt
20V
Gate-source Voltage (max)
±8V
Operating Temp Range
-55C to 150C
Operating Temperature Classification
Military
Mounting
Surface Mount
Pin Count
6
Package Type
MicroFET
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
FDMA510PZTR

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0
©2009 Fairchild Semiconductor Corporation
FDMA510PZ Rev.B2
Dynamic Characteristics
Electrical Characteristics
Off Characteristics
On Characteristics
Switching Characteristics
Drain-Source Diode Characteristics
Notes:
1. R
2. Pulse Test: Pulse Width < 300 s, Duty cycle < 2.0%.
3. The diode connected between the gate and source serves only as protection against ESD. No gate overvoltage rating is implied.
BV
I
I
V
r
g
C
C
C
t
t
t
t
Q
Q
Q
I
V
t
Q
DSS
GSS
d(on)
r
d(off)
f
S
rr
DS(on)
FS
the user's board design.
BV
GS(th)
SD
iss
oss
rss
g
gs
gd
rr
V
Symbol
DSS
T
T
JA
GS(th)
DSS
J
J
is determined with the device mounted on a 1in
Drain to Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
Gate to Source Threshold Voltage
Gate to Source Threshold Voltage
Temperature Coefficient
Static Drain to Source On Resistance
Forward Transconductance
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge
Gate to Source Charge
Gate to Drain “Miller” Charge
Maximum Continuous Drain-Source Diode Forward Current
Source to Drain Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Parameter
a. 52°C/W when mounted on
a 1 in
2
pad of 2 oz copper.
2
T
pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R
J
= 25°C unless otherwise noted
V
I
V
V
V
V
V
V
V
V
V
I
V
f = 1MHz
I
I
V
V
D
V
V
F
D
D
GS
GS
GS
GS
GS
GS
DD
GS
DD
GS
DS
DS
GS
DD
GS
= –7.8A, di/dt = 100A/ s
= –250 A, referenced to 25°C
= –250 A, V
= –250 A, referenced to 25°C
= 0V, I
= V
= –4.5V, I
= –2.5V, I
= –1.8V, I
= –1.5V, I
= –4.5V, I
= –5V, I
= –10V, V
= –10V, I
= –4.5V, R
= –16V, V
= ±8V, V
= –5V, I
= –4.5V
DS
2
Test Conditions
, I
S
D
D
= –2A
D
DS
D
D
D
D
D
D
= –7.8A
= –250 A
GS
GS
= –7.8A
GS
GEN
= –7.8A
= –7.8A
= –6.6A
= –5.5A
= –2.0A
= –7.8A ,T
= 0V
= 0V
= 0V,
= 0V
= 6
J
= 125°C
b. 145°C/W when mounted on a
minimum pad of 2 oz copper.
JC
is guaranteed by design while R
–0.4
Min
–20
–0.8
Typ
1110
–13
–0.7
125
205
185
2.1
4.2
44
64
19
66
27
34
46
60
36
26
7
9
3
Max
1480
–1.2
±10
–1.5
200
103
106
275
280
–1
CA
www.fairchildsemi.com
14
18
27
–2
71
30
37
50
90
40
is determined by
mV/°C
mV/°C
Units
m
nC
nC
nC
nC
pF
pF
pF
ns
ns
ns
ns
ns
V
V
S
A
V
A
A

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