PH1730AL,115 NXP Semiconductors, PH1730AL,115 Datasheet - Page 2

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PH1730AL,115

Manufacturer Part Number
PH1730AL,115
Description
MOSFET N-CH TRENCH 30V LFPAK
Manufacturer
NXP Semiconductors
Series
TrenchMOS™r
Datasheet

Specifications of PH1730AL,115

Package / Case
LFPak-4
Fet Type
MOSFET N-Channel, Metal Oxide
Fet Feature
Logic Level Gate
Rds On (max) @ Id, Vgs
1.7 mOhm @ 15A, 10V
Drain To Source Voltage (vdss)
30V
Current - Continuous Drain (id) @ 25° C
100A
Vgs(th) (max) @ Id
2.15V @ 1mA
Gate Charge (qg) @ Vgs
77.9nC @ 10V
Input Capacitance (ciss) @ Vds
5057pF @ 12V
Power - Max
109W
Mounting Type
Surface Mount
Gate Charge Qg
36.2 nC
Minimum Operating Temperature
- 55 C
Configuration
Single
Transistor Polarity
N-Channel
Resistance Drain-source Rds (on)
1.7 mOhms
Drain-source Breakdown Voltage
30 V
Continuous Drain Current
100 A
Power Dissipation
109 W
Maximum Operating Temperature
+ 175 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
934063082115
NXP Semiconductors
2. Pinning information
Table 2.
3. Ordering information
Table 3.
4. Limiting values
Table 4.
In accordance with the Absolute Maximum Rating System (IEC 60134).
[1]
PH1730AL_3
Product data sheet
Pin
1
2
3
4
mb
Type number
PH1730AL
Symbol
V
V
V
I
I
P
T
T
Source-drain diode
I
I
Avalanche ruggedness
E
D
DM
S
SM
stg
j
DS
DGR
GS
tot
DS(AL)S
Continuous current is limited by package.
Symbol
S
S
S
G
D
Pinning information
Ordering information
Limiting values
Parameter
drain-source voltage
drain-gate voltage
gate-source voltage
drain current
peak drain current
total power dissipation
storage temperature
junction temperature
source current
peak source current
non-repetitive
drain-source avalanche
energy
Package
Name
LFPAK
Description
source
source
source
gate
mounting base; connected to
drain
Description
plastic single-ended surface-mounted package (LFPAK); 4 leads
Conditions
T
T
V
V
t
T
T
t
V
R
p
p
j
j
mb
mb
GS
GS
GS
GS
≤ 10 µs; pulsed; T
≤ 10 µs; pulsed; T
≥ 25 °C; T
≥ 25 °C; T
All information provided in this document is subject to legal disclaimers.
= 25 °C; see
= 25 °C;
= 10 V; T
= 10 V; T
= 10 V; T
= 50 Ω; unclamped
Rev. 03 — 12 January 2010
j
j
≤ 175 °C
≤ 175 °C; R
mb
mb
j(init)
= 100 °C; see
= 25 °C; see
Figure 2
= 25 °C; I
mb
mb
= 25 °C; see
= 25 °C
Simplified outline
GS
D
= 20 kΩ
= 100 A; V
SOT669 (LFPAK)
Figure 1
Figure 1
1 2 3 4
Figure 3
mb
and
sup
N-channel TrenchMOS logic level FET
3
≤ 30 V;
[1]
[1]
[1]
Graphic symbol
Min
-
-
-20
-
-
-
-
-55
-55
-
-
-
PH1730AL
G
mbb076
© NXP B.V. 2010. All rights reserved.
Max
30
30
20
100
100
790
109
175
175
100
790
241
D
Version
SOT669
S
Unit
V
V
V
A
A
A
W
°C
°C
A
A
mJ
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