AD7722ASZ Analog Devices Inc, AD7722ASZ Datasheet - Page 9

• Manufacturer Part Number: AD7722ASZ
• Description: ADC Single Delta-Sigma 195KSPS 16-Bit Parallel/Serial 44-Pin MQFP
• Manufacturer: Analog Devices Inc

Specifications of AD7722ASZ

• Package: 44MQFP
• Resolution: 16 Bit
• Sampling Rate: 195 KSPS
• Architecture: Delta-Sigma
• Number Of Analog Inputs: 1
• Digital Interface Type: Parallel|Serial (3-Wire)
• Input Type: Voltage
• Polarity Of Input Voltage: Unipolar|Bipolar
• Number Of Bits: 16
• Sampling Rate (per Second): 220k
• Data Interface: Serial, Parallel
• Number Of Converters: 1
• Power Dissipation (max): 375mW
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 44-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Mnemonic
DVAL/RD
CFMT/DRDY
DGND/DB15
DGND/DB14
DGND/DB13
DGND/DB12
DGND/DB11
DGND/DB10
FSO/DB9
SDO/DB8
SCO/DB7
FSI/DB6
SFMT/DB5
DOE/DB4
TSI/DB3
DGND/DB2
DGND/DB1
DGND/DB0
REV. B
Pin No. Description
5
4
31
32
33
34
35
36
37
38
40
41
42
43
44
1
2
3
Read input is a level sensitive logic input. The RD logic level is sensed on the rising edge of CLKIN. This
digital input can be used in conjunction with CS to read data from the device. The output data bus is
enabled when the rising edge of CLKIN senses a logic low level on RD if CS is also low. When RD is
sensed high, the output data bits DB15–DB0 will be high impedance.
Data Ready Logic Output. A falling edge indicates a new output word is available to be read from the
output data register. DRDY will return high upon completion of a read operation. If a read operation does
not occur between output updates, DRDY will pulse high for two CLKIN cycles before the next output
update. DRDY also indicates when conversion results are available after a SYNC or RESET sequence
and when completing a self-calibration.
Data Output Bit (MSB).
Data Output Bit.
Data Output Bit.
Data Output Bit.
Data Output Bit.
Data Output Bit.
Data Output Bit.
Data Output Bit.
Data Output Bit.
Data Output Bit.
Data Output Bit.
Data Output Bit.
Data Output Bit.
Data Output Bit.
Data Output Bit.
Data Output Bit (LSB).
CFMT/DRDY
DGND/DB2
DGND/DB1
DGND/DB0
PARALLEL MODE PIN FUNCTION DESCRIPTIONS
DVAL/RD
AGND1
CLKIN
DGND
AGND
UNI
P/S
10
11
2
3
1
4
5
6
7
8
9
44
12 13 14 15 16 17 18 19 20 21 22
PIN 1
IDENTIFIER
PIN CONFIGURATION
43
44-Lead MQFP (S-44B)
42
41
(Not to Scale)
TOP VIEW
40 39 38
AD7722
–9–
37
36 35 34
33
32
31
30
29
28
27
26
25
24
23
DGND/DB13
DGND/DB14
DGND/DB15
SYNC
CS
DGND
CAL
AGND
AGND
REF2
AV
DD
AD7722